1Device-Tree bindings for drm hdmi driver 2 3Required properties: 4- compatible: value should be one among the following: 5 1) "samsung,exynos4210-hdmi" 6 2) "samsung,exynos4212-hdmi" 7 3) "samsung,exynos5420-hdmi" 8 4) "samsung,exynos5433-hdmi" 9- reg: physical base address of the hdmi and length of memory mapped 10 region. 11- interrupts: interrupt number to the cpu. 12- hpd-gpios: following information about the hotplug gpio pin. 13 a) phandle of the gpio controller node. 14 b) pin number within the gpio controller. 15 c) optional flags and pull up/down. 16- ddc: phandle to the hdmi ddc node 17- phy: phandle to the hdmi phy node 18- samsung,syscon-phandle: phandle for system controller node for PMU. 19- #sound-dai-cells: should be 0. 20 21Required properties for Exynos 4210, 4212, 5420 and 5433: 22- clocks: list of clock IDs from SoC clock driver. 23 a) hdmi: Gate of HDMI IP bus clock. 24 b) sclk_hdmi: Gate of HDMI special clock. 25 c) sclk_pixel: Pixel special clock, one of the two possible inputs of 26 HDMI clock mux. 27 d) sclk_hdmiphy: HDMI PHY clock output, one of two possible inputs of 28 HDMI clock mux. 29 e) mout_hdmi: It is required by the driver to switch between the 2 30 parents i.e. sclk_pixel and sclk_hdmiphy. If hdmiphy is stable 31 after configuration, parent is set to sclk_hdmiphy else 32 sclk_pixel. 33- clock-names: aliases as per driver requirements for above clock IDs: 34 "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy" and "mout_hdmi". 35 36Required properties for Exynos 5433: 37- clocks: list of clock specifiers according to common clock bindings. 38 a) hdmi_pclk: Gate of HDMI IP APB bus. 39 b) hdmi_i_pclk: Gate of HDMI-PHY IP APB bus. 40 d) i_tmds_clk: Gate of HDMI TMDS clock. 41 e) i_pixel_clk: Gate of HDMI pixel clock. 42 f) i_spdif_clk: Gate of HDMI SPDIF clock. 43 g) oscclk: Oscillator clock, used as parent of following *_user clocks 44 in case HDMI-PHY is not operational. 45 h) tmds_clko: TMDS clock generated by HDMI-PHY. 46 i) tmds_clko_user: MUX used to switch between oscclk and tmds_clko, 47 respectively if HDMI-PHY is off and operational. 48 j) pixel_clko: Pixel clock generated by HDMI-PHY. 49 k) pixel_clko_user: MUX used to switch between oscclk and pixel_clko, 50 respectively if HDMI-PHY is off and operational. 51- clock-names: aliases for above clock specfiers. 52- samsung,sysreg: handle to syscon used to control the system registers. 53 54Example: 55 56 hdmi { 57 compatible = "samsung,exynos4212-hdmi"; 58 reg = <0x14530000 0x100000>; 59 interrupts = <0 95 0>; 60 hpd-gpios = <&gpx3 7 1>; 61 ddc = <&hdmi_ddc_node>; 62 phy = <&hdmi_phy_node>; 63 samsung,syscon-phandle = <&pmu_system_controller>; 64 }; 65