1Device-Tree bindings for Samsung Exynos SoC display controller (DECON) 2 3DECON (Display and Enhancement Controller) is the Display Controller for the 4Exynos series of SoCs which transfers the image data from a video memory 5buffer to an external LCD interface. 6 7Required properties: 8- compatible: value should be one of: 9 "samsung,exynos5433-decon", "samsung,exynos5433-decon-tv"; 10- reg: physical base address and length of the DECON registers set. 11- interrupt-names: should contain the interrupt names depending on mode of work: 12 video mode: "vsync", 13 command mode: "lcd_sys", 14 command mode with software trigger: "lcd_sys", "te". 15- interrupts or interrupts-extended: list of interrupt specifiers corresponding 16 to names privided in interrupt-names, as described in 17 interrupt-controller/interrupts.txt 18- clocks: must include clock specifiers corresponding to entries in the 19 clock-names property. 20- clock-names: list of clock names sorted in the same order as the clocks 21 property. Must contain "pclk", "aclk_decon", "aclk_smmu_decon0x", 22 "aclk_xiu_decon0x", "pclk_smmu_decon0x", "aclk_smmu_decon1x", 23 "aclk_xiu_decon1x", "pclk_smmu_decon1x", clk_decon_vclk", 24 "sclk_decon_eclk" 25- ports: contains a port which is connected to mic node. address-cells and 26 size-cells must 1 and 0, respectively. 27- port: contains an endpoint node which is connected to the endpoint in the mic 28 node. The reg value muset be 0. 29 30Example: 31SoC specific DT entry: 32decon: decon@13800000 { 33 compatible = "samsung,exynos5433-decon"; 34 reg = <0x13800000 0x2104>; 35 clocks = <&cmu_disp CLK_ACLK_DECON>, <&cmu_disp CLK_ACLK_SMMU_DECON0X>, 36 <&cmu_disp CLK_ACLK_XIU_DECON0X>, 37 <&cmu_disp CLK_PCLK_SMMU_DECON0X>, 38 <&cmu_disp CLK_ACLK_SMMU_DECON1X>, 39 <&cmu_disp CLK_ACLK_XIU_DECON1X>, 40 <&cmu_disp CLK_PCLK_SMMU_DECON1X>, 41 <&cmu_disp CLK_SCLK_DECON_VCLK>, 42 <&cmu_disp CLK_SCLK_DECON_ECLK>; 43 clock-names = "aclk_decon", "aclk_smmu_decon0x", "aclk_xiu_decon0x", 44 "pclk_smmu_decon0x", "aclk_smmu_decon1x", "aclk_xiu_decon1x", 45 "pclk_smmu_decon1x", "sclk_decon_vclk", "sclk_decon_eclk"; 46 interrupt-names = "vsync", "lcd_sys"; 47 interrupts = <0 202 0>, <0 203 0>; 48 49 ports { 50 #address-cells = <1>; 51 #size-cells = <0>; 52 53 port@0 { 54 reg = <0>; 55 decon_to_mic: endpoint { 56 remote-endpoint = <&mic_to_decon>; 57 }; 58 }; 59 }; 60}; 61