1SN65DSI86 DSI to eDP bridge chip 2-------------------------------- 3 4This is the binding for Texas Instruments SN65DSI86 bridge. 5http://www.ti.com/general/docs/lit/getliterature.tsp?genericPartNumber=sn65dsi86&fileType=pdf 6 7Required properties: 8- compatible: Must be "ti,sn65dsi86" 9- reg: i2c address of the chip, 0x2d as per datasheet 10- enable-gpios: gpio specification for bridge_en pin (active high) 11 12- vccio-supply: A 1.8V supply that powers up the digital IOs. 13- vpll-supply: A 1.8V supply that powers up the displayport PLL. 14- vcca-supply: A 1.2V supply that powers up the analog circuits. 15- vcc-supply: A 1.2V supply that powers up the digital core. 16 17Optional properties: 18- interrupts-extended: Specifier for the SN65DSI86 interrupt line. 19 20- gpio-controller: Marks the device has a GPIO controller. 21- #gpio-cells : Should be two. The first cell is the pin number and 22 the second cell is used to specify flags. 23 See ../../gpio/gpio.txt for more information. 24- #pwm-cells : Should be one. See ../../pwm/pwm.yaml for description of 25 the cell formats. 26 27- clock-names: should be "refclk" 28- clocks: Specification for input reference clock. The reference 29 clock rate must be 12 MHz, 19.2 MHz, 26 MHz, 27 MHz or 38.4 MHz. 30 31- data-lanes: See ../../media/video-interface.txt 32- lane-polarities: See ../../media/video-interface.txt 33 34- suspend-gpios: specification for GPIO1 pin on bridge (active low) 35 36Required nodes: 37This device has two video ports. Their connections are modelled using the 38OF graph bindings specified in Documentation/devicetree/bindings/graph.txt. 39 40- Video port 0 for DSI input 41- Video port 1 for eDP output 42 43Example 44------- 45 46edp-bridge@2d { 47 compatible = "ti,sn65dsi86"; 48 #address-cells = <1>; 49 #size-cells = <0>; 50 reg = <0x2d>; 51 52 enable-gpios = <&msmgpio 33 GPIO_ACTIVE_HIGH>; 53 suspend-gpios = <&msmgpio 34 GPIO_ACTIVE_LOW>; 54 55 interrupts-extended = <&gpio3 4 IRQ_TYPE_EDGE_FALLING>; 56 57 vccio-supply = <&pm8916_l17>; 58 vcca-supply = <&pm8916_l6>; 59 vpll-supply = <&pm8916_l17>; 60 vcc-supply = <&pm8916_l6>; 61 62 clock-names = "refclk"; 63 clocks = <&input_refclk>; 64 65 ports { 66 #address-cells = <1>; 67 #size-cells = <0>; 68 69 port@0 { 70 reg = <0>; 71 72 edp_bridge_in: endpoint { 73 remote-endpoint = <&dsi_out>; 74 }; 75 }; 76 77 port@1 { 78 reg = <1>; 79 80 edp_bridge_out: endpoint { 81 data-lanes = <2 1 3 0>; 82 lane-polarities = <0 1 0 1>; 83 remote-endpoint = <&edp_panel_in>; 84 }; 85 }; 86 }; 87} 88