xref: /freebsd/sys/contrib/device-tree/Bindings/display/bridge/adi,adv7511.txt (revision bdd1243df58e60e85101c09001d9812a789b6bc4)
1Analog Devices ADV7511(W)/13/33/35 HDMI Encoders
2------------------------------------------------
3
4The ADV7511, ADV7511W, ADV7513, ADV7533 and ADV7535 are HDMI audio and video
5transmitters compatible with HDMI 1.4 and DVI 1.0. They support color space
6conversion, S/PDIF, CEC and HDCP. ADV7533/5 supports the DSI interface for input
7pixels, while the others support RGB interface.
8
9Required properties:
10
11- compatible: Should be one of:
12		"adi,adv7511"
13		"adi,adv7511w"
14		"adi,adv7513"
15		"adi,adv7533"
16		"adi,adv7535"
17
18- reg: I2C slave addresses
19  The ADV7511 internal registers are split into four pages exposed through
20  different I2C addresses, creating four register maps. Each map has it own
21  I2C address and acts as a standard slave device on the I2C bus. The main
22  address is mandatory, others are optional and revert to defaults if not
23  specified.
24
25
26The ADV7511 supports a large number of input data formats that differ by their
27color depth, color format, clock mode, bit justification and random
28arrangement of components on the data bus. The combination of the following
29properties describe the input and map directly to the video input tables of the
30ADV7511 datasheet that document all the supported combinations.
31
32- adi,input-depth: Number of bits per color component at the input (8, 10 or
33  12).
34- adi,input-colorspace: The input color space, one of "rgb", "yuv422" or
35  "yuv444".
36- adi,input-clock: The input clock type, one of "1x" (one clock cycle per
37  pixel), "2x" (two clock cycles per pixel), "ddr" (one clock cycle per pixel,
38  data driven on both edges).
39
40The following input format properties are required except in "rgb 1x" and
41"yuv444 1x" modes, in which case they must not be specified.
42
43- adi,input-style: The input components arrangement variant (1, 2 or 3), as
44  listed in the input format tables in the datasheet.
45- adi,input-justification: The input bit justification ("left", "evenly",
46  "right").
47
48- avdd-supply: A 1.8V supply that powers up the AVDD pin on the chip.
49- dvdd-supply: A 1.8V supply that powers up the DVDD pin on the chip.
50- pvdd-supply: A 1.8V supply that powers up the PVDD pin on the chip.
51- dvdd-3v-supply: A 3.3V supply that powers up the pin called DVDD_3V
52  on the chip.
53- bgvdd-supply: A 1.8V supply that powers up the BGVDD pin. This is
54  needed only for ADV7511.
55
56The following properties are required for ADV7533 and ADV7535:
57
58- adi,dsi-lanes: Number of DSI data lanes connected to the DSI host. It should
59  be one of 1, 2, 3 or 4.
60- a2vdd-supply: 1.8V supply that powers up the A2VDD pin on the chip.
61- v3p3-supply: A 3.3V supply that powers up the V3P3 pin on the chip.
62- v1p2-supply: A supply that powers up the V1P2 pin on the chip. It can be
63  either 1.2V or 1.8V for ADV7533 but only 1.8V for ADV7535.
64
65Optional properties:
66
67- interrupts: Specifier for the ADV7511 interrupt
68- pd-gpios: Specifier for the GPIO connected to the power down signal
69
70- adi,clock-delay: Video data clock delay relative to the pixel clock, in ps
71  (-1200 ps .. 1600 ps). Defaults to no delay.
72- adi,embedded-sync: The input uses synchronization signals embedded in the
73  data stream (similar to BT.656). Defaults to separate H/V synchronization
74  signals.
75- adi,disable-timing-generator: Only for ADV7533 and ADV7535. Disables the
76  internal timing generator. The chip will rely on the sync signals in the
77  DSI data lanes, rather than generate its own timings for HDMI output.
78- clocks: from common clock binding: reference to the CEC clock.
79- clock-names: from common clock binding: must be "cec".
80- reg-names : Names of maps with programmable addresses.
81	It can contain any map needing a non-default address.
82	Possible maps names are : "main", "edid", "cec", "packet"
83
84Required nodes:
85
86The ADV7511 has two video ports. Their connections are modelled using the OF
87graph bindings specified in Documentation/devicetree/bindings/graph.txt.
88
89- Video port 0 for the RGB, YUV or DSI input. In the case of ADV7533/5, the
90  remote endpoint phandle should be a reference to a valid mipi_dsi_host device
91  node.
92- Video port 1 for the HDMI output
93- Audio port 2 for the HDMI audio input
94
95
96Example
97-------
98
99	adv7511w: hdmi@39 {
100		compatible = "adi,adv7511w";
101		/*
102		 * The EDID page will be accessible on address 0x66 on the I2C
103		 * bus. All other maps continue to use their default addresses.
104		 */
105		reg = <0x39>, <0x66>;
106		reg-names = "main", "edid";
107		interrupt-parent = <&gpio3>;
108		interrupts = <29 IRQ_TYPE_EDGE_FALLING>;
109		clocks = <&cec_clock>;
110		clock-names = "cec";
111
112		adi,input-depth = <8>;
113		adi,input-colorspace = "rgb";
114		adi,input-clock = "1x";
115		adi,input-style = <1>;
116		adi,input-justification = "evenly";
117
118		ports {
119			#address-cells = <1>;
120			#size-cells = <0>;
121
122			port@0 {
123				reg = <0>;
124				adv7511w_in: endpoint {
125					remote-endpoint = <&dpi_out>;
126				};
127			};
128
129			port@1 {
130				reg = <1>;
131				adv7511_out: endpoint {
132					remote-endpoint = <&hdmi_connector_in>;
133				};
134			};
135
136			port@2 {
137				reg = <2>;
138				codec_endpoint: endpoint {
139					remote-endpoint = <&i2s0_cpu_endpoint>;
140				};
141			};
142		};
143	};
144