1*c66ec88fSEmmanuel Vadot* ARM PrimeCell Color LCD Controller PL110/PL111 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotSee also Documentation/devicetree/bindings/arm/primecell.yaml 4*c66ec88fSEmmanuel Vadot 5*c66ec88fSEmmanuel VadotRequired properties: 6*c66ec88fSEmmanuel Vadot 7*c66ec88fSEmmanuel Vadot- compatible: must be one of: 8*c66ec88fSEmmanuel Vadot "arm,pl110", "arm,primecell" 9*c66ec88fSEmmanuel Vadot "arm,pl111", "arm,primecell" 10*c66ec88fSEmmanuel Vadot 11*c66ec88fSEmmanuel Vadot- reg: base address and size of the control registers block 12*c66ec88fSEmmanuel Vadot 13*c66ec88fSEmmanuel Vadot- interrupt-names: either the single entry "combined" representing a 14*c66ec88fSEmmanuel Vadot combined interrupt output (CLCDINTR), or the four entries 15*c66ec88fSEmmanuel Vadot "mbe", "vcomp", "lnbu", "fuf" representing the individual 16*c66ec88fSEmmanuel Vadot CLCDMBEINTR, CLCDVCOMPINTR, CLCDLNBUINTR, CLCDFUFINTR interrupts 17*c66ec88fSEmmanuel Vadot 18*c66ec88fSEmmanuel Vadot- interrupts: contains an interrupt specifier for each entry in 19*c66ec88fSEmmanuel Vadot interrupt-names 20*c66ec88fSEmmanuel Vadot 21*c66ec88fSEmmanuel Vadot- clock-names: should contain "clcdclk" and "apb_pclk" 22*c66ec88fSEmmanuel Vadot 23*c66ec88fSEmmanuel Vadot- clocks: contains phandle and clock specifier pairs for the entries 24*c66ec88fSEmmanuel Vadot in the clock-names property. See 25*c66ec88fSEmmanuel Vadot Documentation/devicetree/bindings/clock/clock-bindings.txt 26*c66ec88fSEmmanuel Vadot 27*c66ec88fSEmmanuel VadotOptional properties: 28*c66ec88fSEmmanuel Vadot 29*c66ec88fSEmmanuel Vadot- memory-region: phandle to a node describing memory (see 30*c66ec88fSEmmanuel Vadot Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt) 31*c66ec88fSEmmanuel Vadot to be used for the framebuffer; if not present, the framebuffer 32*c66ec88fSEmmanuel Vadot may be located anywhere in the memory 33*c66ec88fSEmmanuel Vadot 34*c66ec88fSEmmanuel Vadot- max-memory-bandwidth: maximum bandwidth in bytes per second that the 35*c66ec88fSEmmanuel Vadot cell's memory interface can handle; if not present, the memory 36*c66ec88fSEmmanuel Vadot interface is fast enough to handle all possible video modes 37*c66ec88fSEmmanuel Vadot 38*c66ec88fSEmmanuel VadotRequired sub-nodes: 39*c66ec88fSEmmanuel Vadot 40*c66ec88fSEmmanuel Vadot- port: describes LCD panel signals, following the common binding 41*c66ec88fSEmmanuel Vadot for video transmitter interfaces; see 42*c66ec88fSEmmanuel Vadot Documentation/devicetree/bindings/media/video-interfaces.txt 43*c66ec88fSEmmanuel Vadot 44*c66ec88fSEmmanuel VadotDeprecated properties: 45*c66ec88fSEmmanuel Vadot The port's endbpoint subnode had this, now deprecated property 46*c66ec88fSEmmanuel Vadot in the past. Drivers should be able to survive without it: 47*c66ec88fSEmmanuel Vadot 48*c66ec88fSEmmanuel Vadot - arm,pl11x,tft-r0g0b0-pads: an array of three 32-bit values, 49*c66ec88fSEmmanuel Vadot defining the way CLD pads are wired up; first value 50*c66ec88fSEmmanuel Vadot contains index of the "CLD" external pin (pad) used 51*c66ec88fSEmmanuel Vadot as R0 (first bit of the red component), second value 52*c66ec88fSEmmanuel Vadot index of the pad used as G0, third value index of the 53*c66ec88fSEmmanuel Vadot pad used as B0, see also "LCD panel signal multiplexing 54*c66ec88fSEmmanuel Vadot details" paragraphs in the PL110/PL111 Technical 55*c66ec88fSEmmanuel Vadot Reference Manuals; this implicitly defines available 56*c66ec88fSEmmanuel Vadot color modes, for example: 57*c66ec88fSEmmanuel Vadot - PL111 TFT 4:4:4 panel: 58*c66ec88fSEmmanuel Vadot arm,pl11x,tft-r0g0b0-pads = <4 15 20>; 59*c66ec88fSEmmanuel Vadot - PL110 TFT (1:)5:5:5 panel: 60*c66ec88fSEmmanuel Vadot arm,pl11x,tft-r0g0b0-pads = <1 7 13>; 61*c66ec88fSEmmanuel Vadot - PL111 TFT (1:)5:5:5 panel: 62*c66ec88fSEmmanuel Vadot arm,pl11x,tft-r0g0b0-pads = <3 11 19>; 63*c66ec88fSEmmanuel Vadot - PL111 TFT 5:6:5 panel: 64*c66ec88fSEmmanuel Vadot arm,pl11x,tft-r0g0b0-pads = <3 10 19>; 65*c66ec88fSEmmanuel Vadot - PL110 and PL111 TFT 8:8:8 panel: 66*c66ec88fSEmmanuel Vadot arm,pl11x,tft-r0g0b0-pads = <0 8 16>; 67*c66ec88fSEmmanuel Vadot - PL110 and PL111 TFT 8:8:8 panel, R & B components swapped: 68*c66ec88fSEmmanuel Vadot arm,pl11x,tft-r0g0b0-pads = <16 8 0>; 69*c66ec88fSEmmanuel Vadot 70*c66ec88fSEmmanuel Vadot 71*c66ec88fSEmmanuel VadotExample: 72*c66ec88fSEmmanuel Vadot 73*c66ec88fSEmmanuel Vadot clcd@10020000 { 74*c66ec88fSEmmanuel Vadot compatible = "arm,pl111", "arm,primecell"; 75*c66ec88fSEmmanuel Vadot reg = <0x10020000 0x1000>; 76*c66ec88fSEmmanuel Vadot interrupt-names = "combined"; 77*c66ec88fSEmmanuel Vadot interrupts = <0 44 4>; 78*c66ec88fSEmmanuel Vadot clocks = <&oscclk1>, <&oscclk2>; 79*c66ec88fSEmmanuel Vadot clock-names = "clcdclk", "apb_pclk"; 80*c66ec88fSEmmanuel Vadot max-memory-bandwidth = <94371840>; /* Bps, 1024x768@60 16bpp */ 81*c66ec88fSEmmanuel Vadot 82*c66ec88fSEmmanuel Vadot port { 83*c66ec88fSEmmanuel Vadot clcd_pads: endpoint { 84*c66ec88fSEmmanuel Vadot remote-endpoint = <&clcd_panel>; 85*c66ec88fSEmmanuel Vadot }; 86*c66ec88fSEmmanuel Vadot }; 87*c66ec88fSEmmanuel Vadot 88*c66ec88fSEmmanuel Vadot }; 89*c66ec88fSEmmanuel Vadot 90*c66ec88fSEmmanuel Vadot panel { 91*c66ec88fSEmmanuel Vadot compatible = "panel-dpi"; 92*c66ec88fSEmmanuel Vadot 93*c66ec88fSEmmanuel Vadot port { 94*c66ec88fSEmmanuel Vadot clcd_panel: endpoint { 95*c66ec88fSEmmanuel Vadot remote-endpoint = <&clcd_pads>; 96*c66ec88fSEmmanuel Vadot }; 97*c66ec88fSEmmanuel Vadot }; 98*c66ec88fSEmmanuel Vadot 99*c66ec88fSEmmanuel Vadot panel-timing { 100*c66ec88fSEmmanuel Vadot clock-frequency = <25175000>; 101*c66ec88fSEmmanuel Vadot hactive = <640>; 102*c66ec88fSEmmanuel Vadot hback-porch = <40>; 103*c66ec88fSEmmanuel Vadot hfront-porch = <24>; 104*c66ec88fSEmmanuel Vadot hsync-len = <96>; 105*c66ec88fSEmmanuel Vadot vactive = <480>; 106*c66ec88fSEmmanuel Vadot vback-porch = <32>; 107*c66ec88fSEmmanuel Vadot vfront-porch = <11>; 108*c66ec88fSEmmanuel Vadot vsync-len = <2>; 109*c66ec88fSEmmanuel Vadot }; 110*c66ec88fSEmmanuel Vadot }; 111