1d5b0e70fSEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2d5b0e70fSEmmanuel Vadot%YAML 1.2 3d5b0e70fSEmmanuel Vadot--- 4d5b0e70fSEmmanuel Vadot$id: http://devicetree.org/schemas/display/arm,hdlcd.yaml# 5d5b0e70fSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6d5b0e70fSEmmanuel Vadot 7*8bab661aSEmmanuel Vadottitle: Arm HDLCD display controller 8d5b0e70fSEmmanuel Vadot 9d5b0e70fSEmmanuel Vadotmaintainers: 10d5b0e70fSEmmanuel Vadot - Liviu Dudau <Liviu.Dudau@arm.com> 11d5b0e70fSEmmanuel Vadot - Andre Przywara <andre.przywara@arm.com> 12d5b0e70fSEmmanuel Vadot 13d5b0e70fSEmmanuel Vadotdescription: 14d5b0e70fSEmmanuel Vadot The Arm HDLCD is a display controller found on several development platforms 15d5b0e70fSEmmanuel Vadot produced by ARM Ltd and in more modern of its Fast Models. The HDLCD is an 16d5b0e70fSEmmanuel Vadot RGB streamer that reads the data from a framebuffer and sends it to a single 17d5b0e70fSEmmanuel Vadot digital encoder (DVI or HDMI). 18d5b0e70fSEmmanuel Vadot 19d5b0e70fSEmmanuel Vadotproperties: 20d5b0e70fSEmmanuel Vadot compatible: 21d5b0e70fSEmmanuel Vadot const: arm,hdlcd 22d5b0e70fSEmmanuel Vadot 23d5b0e70fSEmmanuel Vadot reg: 24d5b0e70fSEmmanuel Vadot maxItems: 1 25d5b0e70fSEmmanuel Vadot 26d5b0e70fSEmmanuel Vadot interrupts: 27d5b0e70fSEmmanuel Vadot maxItems: 1 28d5b0e70fSEmmanuel Vadot 29d5b0e70fSEmmanuel Vadot clock-names: 30d5b0e70fSEmmanuel Vadot const: pxlclk 31d5b0e70fSEmmanuel Vadot 32d5b0e70fSEmmanuel Vadot clocks: 33d5b0e70fSEmmanuel Vadot maxItems: 1 34d5b0e70fSEmmanuel Vadot description: The input reference for the pixel clock. 35d5b0e70fSEmmanuel Vadot 36d5b0e70fSEmmanuel Vadot memory-region: 37d5b0e70fSEmmanuel Vadot maxItems: 1 38d5b0e70fSEmmanuel Vadot description: 39d5b0e70fSEmmanuel Vadot Phandle to a node describing memory to be used for the framebuffer. 40d5b0e70fSEmmanuel Vadot If not present, the framebuffer may be located anywhere in memory. 41d5b0e70fSEmmanuel Vadot 42d5b0e70fSEmmanuel Vadot iommus: 43d5b0e70fSEmmanuel Vadot maxItems: 1 44d5b0e70fSEmmanuel Vadot 45d5b0e70fSEmmanuel Vadot port: 46d5b0e70fSEmmanuel Vadot $ref: /schemas/graph.yaml#/properties/port 47d5b0e70fSEmmanuel Vadot unevaluatedProperties: false 48d5b0e70fSEmmanuel Vadot description: 49d5b0e70fSEmmanuel Vadot Output endpoint of the controller, connecting the LCD panel signals. 50d5b0e70fSEmmanuel Vadot 51d5b0e70fSEmmanuel VadotadditionalProperties: false 52d5b0e70fSEmmanuel Vadot 53d5b0e70fSEmmanuel Vadotrequired: 54d5b0e70fSEmmanuel Vadot - compatible 55d5b0e70fSEmmanuel Vadot - reg 56d5b0e70fSEmmanuel Vadot - interrupts 57d5b0e70fSEmmanuel Vadot - clocks 58d5b0e70fSEmmanuel Vadot - port 59d5b0e70fSEmmanuel Vadot 60d5b0e70fSEmmanuel Vadotexamples: 61d5b0e70fSEmmanuel Vadot - | 62d5b0e70fSEmmanuel Vadot hdlcd@2b000000 { 63d5b0e70fSEmmanuel Vadot compatible = "arm,hdlcd"; 64d5b0e70fSEmmanuel Vadot reg = <0x2b000000 0x1000>; 65d5b0e70fSEmmanuel Vadot interrupts = <0 85 4>; 66d5b0e70fSEmmanuel Vadot clocks = <&oscclk5>; 67d5b0e70fSEmmanuel Vadot clock-names = "pxlclk"; 68d5b0e70fSEmmanuel Vadot port { 69d5b0e70fSEmmanuel Vadot hdlcd_output: endpoint { 70d5b0e70fSEmmanuel Vadot remote-endpoint = <&hdmi_enc_input>; 71d5b0e70fSEmmanuel Vadot }; 72d5b0e70fSEmmanuel Vadot }; 73d5b0e70fSEmmanuel Vadot }; 74d5b0e70fSEmmanuel Vadot 75d5b0e70fSEmmanuel Vadot /* HDMI encoder on I2C bus */ 76d5b0e70fSEmmanuel Vadot i2c { 77d5b0e70fSEmmanuel Vadot #address-cells = <1>; 78d5b0e70fSEmmanuel Vadot #size-cells = <0>; 79d5b0e70fSEmmanuel Vadot hdmi-transmitter@70 { 80d5b0e70fSEmmanuel Vadot compatible = "nxp,tda998x"; 81d5b0e70fSEmmanuel Vadot reg = <0x70>; 82d5b0e70fSEmmanuel Vadot port { 83d5b0e70fSEmmanuel Vadot hdmi_enc_input: endpoint { 84d5b0e70fSEmmanuel Vadot remote-endpoint = <&hdlcd_output>; 85d5b0e70fSEmmanuel Vadot }; 86d5b0e70fSEmmanuel Vadot }; 87d5b0e70fSEmmanuel Vadot }; 88d5b0e70fSEmmanuel Vadot }; 89d5b0e70fSEmmanuel Vadot... 90