xref: /freebsd/sys/contrib/device-tree/Bindings/display/allwinner,sun4i-a10-display-backend.yaml (revision cfd6422a5217410fbd66f7a7a8a64d9d85e61229) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-backend.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A10 Display Engine Backend Device Tree Bindings
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <mripard@kernel.org>
12
13description: |
14  The display engine backend exposes layers and sprites to the system.
15
16properties:
17  compatible:
18    enum:
19      - allwinner,sun4i-a10-display-backend
20      - allwinner,sun5i-a13-display-backend
21      - allwinner,sun6i-a31-display-backend
22      - allwinner,sun7i-a20-display-backend
23      - allwinner,sun8i-a23-display-backend
24      - allwinner,sun8i-a33-display-backend
25      - allwinner,sun9i-a80-display-backend
26
27  reg:
28    minItems: 1
29    maxItems: 2
30    items:
31      - description: Display Backend registers
32      - description: SAT registers
33
34  reg-names:
35    minItems: 1
36    maxItems: 2
37    items:
38      - const: be
39      - const: sat
40
41  interrupts:
42    maxItems: 1
43
44  clocks:
45    minItems: 3
46    maxItems: 4
47    items:
48      - description: The backend interface clock
49      - description: The backend module clock
50      - description: The backend DRAM clock
51      - description: The SAT clock
52
53  clock-names:
54    minItems: 3
55    maxItems: 4
56    items:
57      - const: ahb
58      - const: mod
59      - const: ram
60      - const: sat
61
62  resets:
63    minItems: 1
64    maxItems: 2
65    items:
66      - description: The Backend reset line
67      - description: The SAT reset line
68
69  reset-names:
70    minItems: 1
71    maxItems: 2
72    items:
73      - const: be
74      - const: sat
75
76  # FIXME: This should be made required eventually once every SoC will
77  # have the MBUS declared.
78  interconnects:
79    maxItems: 1
80
81  # FIXME: This should be made required eventually once every SoC will
82  # have the MBUS declared.
83  interconnect-names:
84    const: dma-mem
85
86  ports:
87    type: object
88    description: |
89      A ports node with endpoint definitions as defined in
90      Documentation/devicetree/bindings/media/video-interfaces.txt.
91
92    properties:
93      "#address-cells":
94        const: 1
95
96      "#size-cells":
97        const: 0
98
99      port@0:
100        type: object
101        description: |
102          Input endpoints of the controller.
103
104      port@1:
105        type: object
106        description: |
107          Output endpoints of the controller.
108
109    required:
110      - "#address-cells"
111      - "#size-cells"
112      - port@0
113      - port@1
114
115    additionalProperties: false
116
117required:
118  - compatible
119  - reg
120  - interrupts
121  - clocks
122  - clock-names
123  - resets
124  - ports
125
126additionalProperties: false
127
128if:
129  properties:
130    compatible:
131      contains:
132        const: allwinner,sun8i-a33-display-backend
133
134then:
135  properties:
136    reg:
137      minItems: 2
138
139    reg-names:
140      minItems: 2
141
142    clocks:
143      minItems: 4
144
145    clock-names:
146      minItems: 4
147
148    resets:
149      minItems: 2
150
151    reset-names:
152      minItems: 2
153
154  required:
155    - reg-names
156    - reset-names
157
158else:
159  properties:
160    reg:
161      maxItems: 1
162
163    reg-names:
164      maxItems: 1
165
166    clocks:
167      maxItems: 3
168
169    clock-names:
170      maxItems: 3
171
172    resets:
173      maxItems: 1
174
175    reset-names:
176      maxItems: 1
177
178examples:
179  - |
180    /*
181     * This comes from the clock/sun4i-a10-ccu.h and
182     * reset/sun4i-a10-ccu.h headers, but we can't include them since
183     * it would trigger a bunch of warnings for redefinitions of
184     * symbols with the other example.
185     */
186
187    #define CLK_AHB_DE_BE0	42
188    #define CLK_DRAM_DE_BE0	140
189    #define CLK_DE_BE0		144
190    #define RST_DE_BE0		5
191
192    display-backend@1e60000 {
193        compatible = "allwinner,sun4i-a10-display-backend";
194        reg = <0x01e60000 0x10000>;
195        interrupts = <47>;
196        clocks = <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
197                 <&ccu CLK_DRAM_DE_BE0>;
198        clock-names = "ahb", "mod",
199                      "ram";
200        resets = <&ccu RST_DE_BE0>;
201
202        ports {
203            #address-cells = <1>;
204            #size-cells = <0>;
205
206            port@0 {
207                #address-cells = <1>;
208                #size-cells = <0>;
209                reg = <0>;
210
211                endpoint@0 {
212                    reg = <0>;
213                    remote-endpoint = <&fe0_out_be0>;
214                };
215
216                endpoint@1 {
217                    reg = <1>;
218                    remote-endpoint = <&fe1_out_be0>;
219                };
220            };
221
222            port@1 {
223                #address-cells = <1>;
224                #size-cells = <0>;
225                reg = <1>;
226
227                endpoint@0 {
228                    reg = <0>;
229                    remote-endpoint = <&tcon0_in_be0>;
230                };
231
232                endpoint@1 {
233                    reg = <1>;
234                    remote-endpoint = <&tcon1_in_be0>;
235                };
236            };
237        };
238    };
239
240  - |
241    #include <dt-bindings/interrupt-controller/arm-gic.h>
242
243    /*
244     * This comes from the clock/sun8i-a23-a33-ccu.h and
245     * reset/sun8i-a23-a33-ccu.h headers, but we can't include them
246     * since it would trigger a bunch of warnings for redefinitions of
247     * symbols with the other example.
248     */
249
250    #define CLK_BUS_DE_BE	40
251    #define CLK_BUS_SAT		46
252    #define CLK_DRAM_DE_BE	84
253    #define CLK_DE_BE		85
254    #define RST_BUS_DE_BE	21
255    #define RST_BUS_SAT		27
256
257    display-backend@1e60000 {
258        compatible = "allwinner,sun8i-a33-display-backend";
259        reg = <0x01e60000 0x10000>, <0x01e80000 0x1000>;
260        reg-names = "be", "sat";
261        interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
262        clocks = <&ccu CLK_BUS_DE_BE>, <&ccu CLK_DE_BE>,
263                 <&ccu CLK_DRAM_DE_BE>, <&ccu CLK_BUS_SAT>;
264        clock-names = "ahb", "mod",
265                      "ram", "sat";
266        resets = <&ccu RST_BUS_DE_BE>, <&ccu RST_BUS_SAT>;
267        reset-names = "be", "sat";
268
269        ports {
270            #address-cells = <1>;
271            #size-cells = <0>;
272
273            port@0 {
274                reg = <0>;
275
276                endpoint {
277                    remote-endpoint = <&fe0_out_be0>;
278                };
279            };
280
281            port@1 {
282                reg = <1>;
283
284                endpoint {
285                    remote-endpoint = <&drc0_in_be0>;
286                };
287            };
288        };
289    };
290
291...
292