xref: /freebsd/sys/contrib/device-tree/Bindings/display/allwinner,sun4i-a10-display-backend.yaml (revision 18054d0220cfc8df9c9568c437bd6fbb59d53c3c) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-display-backend.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Allwinner A10 Display Engine Backend Device Tree Bindings
8
9maintainers:
10  - Chen-Yu Tsai <wens@csie.org>
11  - Maxime Ripard <mripard@kernel.org>
12
13description: |
14  The display engine backend exposes layers and sprites to the system.
15
16properties:
17  compatible:
18    enum:
19      - allwinner,sun4i-a10-display-backend
20      - allwinner,sun5i-a13-display-backend
21      - allwinner,sun6i-a31-display-backend
22      - allwinner,sun7i-a20-display-backend
23      - allwinner,sun8i-a23-display-backend
24      - allwinner,sun8i-a33-display-backend
25      - allwinner,sun9i-a80-display-backend
26
27  reg:
28    minItems: 1
29    maxItems: 2
30    items:
31      - description: Display Backend registers
32      - description: SAT registers
33
34  reg-names:
35    minItems: 1
36    maxItems: 2
37    items:
38      - const: be
39      - const: sat
40
41  interrupts:
42    maxItems: 1
43
44  clocks:
45    minItems: 3
46    maxItems: 4
47    items:
48      - description: The backend interface clock
49      - description: The backend module clock
50      - description: The backend DRAM clock
51      - description: The SAT clock
52
53  clock-names:
54    minItems: 3
55    maxItems: 4
56    items:
57      - const: ahb
58      - const: mod
59      - const: ram
60      - const: sat
61
62  resets:
63    minItems: 1
64    maxItems: 2
65    items:
66      - description: The Backend reset line
67      - description: The SAT reset line
68
69  reset-names:
70    minItems: 1
71    maxItems: 2
72    items:
73      - const: be
74      - const: sat
75
76  # FIXME: This should be made required eventually once every SoC will
77  # have the MBUS declared.
78  interconnects:
79    maxItems: 1
80
81  # FIXME: This should be made required eventually once every SoC will
82  # have the MBUS declared.
83  interconnect-names:
84    const: dma-mem
85
86  ports:
87    $ref: /schemas/graph.yaml#/properties/ports
88
89    properties:
90      port@0:
91        $ref: /schemas/graph.yaml#/properties/port
92        description:
93          Input endpoints of the controller.
94
95      port@1:
96        $ref: /schemas/graph.yaml#/properties/port
97        description:
98          Output endpoints of the controller.
99
100    required:
101      - port@0
102      - port@1
103
104required:
105  - compatible
106  - reg
107  - interrupts
108  - clocks
109  - clock-names
110  - resets
111  - ports
112
113additionalProperties: false
114
115if:
116  properties:
117    compatible:
118      contains:
119        const: allwinner,sun8i-a33-display-backend
120
121then:
122  properties:
123    reg:
124      minItems: 2
125
126    reg-names:
127      minItems: 2
128
129    clocks:
130      minItems: 4
131
132    clock-names:
133      minItems: 4
134
135    resets:
136      minItems: 2
137
138    reset-names:
139      minItems: 2
140
141  required:
142    - reg-names
143    - reset-names
144
145else:
146  properties:
147    reg:
148      maxItems: 1
149
150    reg-names:
151      maxItems: 1
152
153    clocks:
154      maxItems: 3
155
156    clock-names:
157      maxItems: 3
158
159    resets:
160      maxItems: 1
161
162    reset-names:
163      maxItems: 1
164
165examples:
166  - |
167    /*
168     * This comes from the clock/sun4i-a10-ccu.h and
169     * reset/sun4i-a10-ccu.h headers, but we can't include them since
170     * it would trigger a bunch of warnings for redefinitions of
171     * symbols with the other example.
172     */
173
174    #define CLK_AHB_DE_BE0	42
175    #define CLK_DRAM_DE_BE0	140
176    #define CLK_DE_BE0		144
177    #define RST_DE_BE0		5
178
179    display-backend@1e60000 {
180        compatible = "allwinner,sun4i-a10-display-backend";
181        reg = <0x01e60000 0x10000>;
182        interrupts = <47>;
183        clocks = <&ccu CLK_AHB_DE_BE0>, <&ccu CLK_DE_BE0>,
184                 <&ccu CLK_DRAM_DE_BE0>;
185        clock-names = "ahb", "mod",
186                      "ram";
187        resets = <&ccu RST_DE_BE0>;
188
189        ports {
190            #address-cells = <1>;
191            #size-cells = <0>;
192
193            port@0 {
194                #address-cells = <1>;
195                #size-cells = <0>;
196                reg = <0>;
197
198                endpoint@0 {
199                    reg = <0>;
200                    remote-endpoint = <&fe0_out_be0>;
201                };
202
203                endpoint@1 {
204                    reg = <1>;
205                    remote-endpoint = <&fe1_out_be0>;
206                };
207            };
208
209            port@1 {
210                #address-cells = <1>;
211                #size-cells = <0>;
212                reg = <1>;
213
214                endpoint@0 {
215                    reg = <0>;
216                    remote-endpoint = <&tcon0_in_be0>;
217                };
218
219                endpoint@1 {
220                    reg = <1>;
221                    remote-endpoint = <&tcon1_in_be0>;
222                };
223            };
224        };
225    };
226
227  - |
228    #include <dt-bindings/interrupt-controller/arm-gic.h>
229
230    /*
231     * This comes from the clock/sun8i-a23-a33-ccu.h and
232     * reset/sun8i-a23-a33-ccu.h headers, but we can't include them
233     * since it would trigger a bunch of warnings for redefinitions of
234     * symbols with the other example.
235     */
236
237    #define CLK_BUS_DE_BE	40
238    #define CLK_BUS_SAT		46
239    #define CLK_DRAM_DE_BE	84
240    #define CLK_DE_BE		85
241    #define RST_BUS_DE_BE	21
242    #define RST_BUS_SAT		27
243
244    display-backend@1e60000 {
245        compatible = "allwinner,sun8i-a33-display-backend";
246        reg = <0x01e60000 0x10000>, <0x01e80000 0x1000>;
247        reg-names = "be", "sat";
248        interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
249        clocks = <&ccu CLK_BUS_DE_BE>, <&ccu CLK_DE_BE>,
250                 <&ccu CLK_DRAM_DE_BE>, <&ccu CLK_BUS_SAT>;
251        clock-names = "ahb", "mod",
252                      "ram", "sat";
253        resets = <&ccu RST_BUS_DE_BE>, <&ccu RST_BUS_SAT>;
254        reset-names = "be", "sat";
255
256        ports {
257            #address-cells = <1>;
258            #size-cells = <0>;
259
260            port@0 {
261                reg = <0>;
262
263                endpoint {
264                    remote-endpoint = <&fe0_out_be0>;
265                };
266            };
267
268            port@1 {
269                reg = <1>;
270
271                endpoint {
272                    remote-endpoint = <&drc0_in_be0>;
273                };
274            };
275        };
276    };
277
278...
279