xref: /freebsd/sys/contrib/device-tree/Bindings/devfreq/nvidia,tegra30-actmon.yaml (revision 5956d97f4b3204318ceb6aa9c77bd0bc6ea87a41) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/devfreq/nvidia,tegra30-actmon.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NVIDIA Tegra30 Activity Monitor
8
9maintainers:
10  - Dmitry Osipenko <digetx@gmail.com>
11  - Jon Hunter <jonathanh@nvidia.com>
12  - Thierry Reding <thierry.reding@gmail.com>
13
14description: |
15  The activity monitor block collects statistics about the behaviour of other
16  components in the system. This information can be used to derive the rate at
17  which the external memory needs to be clocked in order to serve all requests
18  from the monitored clients.
19
20properties:
21  compatible:
22    enum:
23      - nvidia,tegra30-actmon
24      - nvidia,tegra114-actmon
25      - nvidia,tegra124-actmon
26      - nvidia,tegra210-actmon
27
28  reg:
29    maxItems: 1
30
31  clocks:
32    maxItems: 2
33
34  clock-names:
35    items:
36      - const: actmon
37      - const: emc
38
39  resets:
40    maxItems: 1
41
42  reset-names:
43    items:
44      - const: actmon
45
46  interrupts:
47    maxItems: 1
48
49  interconnects:
50    minItems: 1
51    maxItems: 12
52
53  interconnect-names:
54    minItems: 1
55    maxItems: 12
56    description:
57      Should include name of the interconnect path for each interconnect
58      entry. Consult TRM documentation for information about available
59      memory clients, see MEMORY CONTROLLER and ACTIVITY MONITOR sections.
60
61  operating-points-v2:
62    description:
63      Should contain freqs and voltages and opp-supported-hw property, which
64      is a bitfield indicating SoC speedo ID mask.
65
66  "#cooling-cells":
67    const: 2
68
69required:
70  - compatible
71  - reg
72  - clocks
73  - clock-names
74  - resets
75  - reset-names
76  - interrupts
77  - interconnects
78  - interconnect-names
79  - operating-points-v2
80  - "#cooling-cells"
81
82additionalProperties: false
83
84examples:
85  - |
86    #include <dt-bindings/memory/tegra30-mc.h>
87
88    mc: memory-controller@7000f000 {
89        compatible = "nvidia,tegra30-mc";
90        reg = <0x7000f000 0x400>;
91        clocks = <&clk 32>;
92        clock-names = "mc";
93
94        interrupts = <0 77 4>;
95
96        #iommu-cells = <1>;
97        #reset-cells = <1>;
98        #interconnect-cells = <1>;
99    };
100
101    emc: external-memory-controller@7000f400 {
102        compatible = "nvidia,tegra30-emc";
103        reg = <0x7000f400 0x400>;
104        interrupts = <0 78 4>;
105        clocks = <&clk 57>;
106
107        nvidia,memory-controller = <&mc>;
108        operating-points-v2 = <&dvfs_opp_table>;
109        power-domains = <&domain>;
110
111        #interconnect-cells = <0>;
112    };
113
114    actmon@6000c800 {
115        compatible = "nvidia,tegra30-actmon";
116        reg = <0x6000c800 0x400>;
117        interrupts = <0 45 4>;
118        clocks = <&clk 119>, <&clk 57>;
119        clock-names = "actmon", "emc";
120        resets = <&rst 119>;
121        reset-names = "actmon";
122        operating-points-v2 = <&dvfs_opp_table>;
123        interconnects = <&mc TEGRA30_MC_MPCORER &emc>;
124        interconnect-names = "cpu-read";
125        #cooling-cells = <2>;
126    };
127