xref: /freebsd/sys/contrib/device-tree/Bindings/crypto/qcom-qce.yaml (revision f126890ac5386406dadf7c4cfa9566cbb56537c5) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/crypto/qcom-qce.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm crypto engine driver
8
9maintainers:
10  - Bhupesh Sharma <bhupesh.sharma@linaro.org>
11
12description:
13  This document defines the binding for the QCE crypto
14  controller found on Qualcomm parts.
15
16properties:
17  compatible:
18    oneOf:
19      - const: qcom,crypto-v5.1
20        deprecated: true
21        description: Kept only for ABI backward compatibility
22
23      - const: qcom,crypto-v5.4
24        deprecated: true
25        description: Kept only for ABI backward compatibility
26
27      - items:
28          - enum:
29              - qcom,ipq4019-qce
30              - qcom,sm8150-qce
31          - const: qcom,qce
32
33      - items:
34          - enum:
35              - qcom,ipq6018-qce
36              - qcom,ipq8074-qce
37              - qcom,msm8996-qce
38              - qcom,qcm2290-qce
39              - qcom,sdm845-qce
40              - qcom,sm6115-qce
41          - const: qcom,ipq4019-qce
42          - const: qcom,qce
43
44      - items:
45          - enum:
46              - qcom,sm8250-qce
47              - qcom,sm8350-qce
48              - qcom,sm8450-qce
49              - qcom,sm8550-qce
50          - const: qcom,sm8150-qce
51          - const: qcom,qce
52
53  reg:
54    maxItems: 1
55
56  clocks:
57    minItems: 1
58    maxItems: 3
59
60  clock-names:
61    minItems: 1
62    maxItems: 3
63
64  iommus:
65    minItems: 1
66    maxItems: 8
67    description:
68      phandle to apps_smmu node with sid mask.
69
70  interconnects:
71    maxItems: 1
72    description:
73      Interconnect path between qce crypto and main memory.
74
75  interconnect-names:
76    const: memory
77
78  dmas:
79    items:
80      - description: DMA specifiers for rx dma channel.
81      - description: DMA specifiers for tx dma channel.
82
83  dma-names:
84    items:
85      - const: rx
86      - const: tx
87
88allOf:
89  - if:
90      properties:
91        compatible:
92          contains:
93            enum:
94              - qcom,crypto-v5.1
95              - qcom,crypto-v5.4
96              - qcom,ipq6018-qce
97              - qcom,ipq8074-qce
98              - qcom,msm8996-qce
99              - qcom,sdm845-qce
100    then:
101      properties:
102        clocks:
103          maxItems: 3
104        clock-names:
105          items:
106            - const: iface
107            - const: bus
108            - const: core
109      required:
110        - clocks
111        - clock-names
112
113  - if:
114      properties:
115        compatible:
116          contains:
117            enum:
118              - qcom,qcm2290-qce
119              - qcom,sm6115-qce
120    then:
121      properties:
122        clocks:
123          maxItems: 1
124        clock-names:
125          items:
126            - const: core
127      required:
128        - clocks
129        - clock-names
130
131required:
132  - compatible
133  - reg
134  - dmas
135  - dma-names
136
137additionalProperties: false
138
139examples:
140  - |
141    #include <dt-bindings/clock/qcom,gcc-apq8084.h>
142    crypto-engine@fd45a000 {
143        compatible = "qcom,ipq6018-qce", "qcom,ipq4019-qce", "qcom,qce";
144        reg = <0xfd45a000 0x6000>;
145        clocks = <&gcc GCC_CE2_AHB_CLK>,
146                 <&gcc GCC_CE2_AXI_CLK>,
147                 <&gcc GCC_CE2_CLK>;
148        clock-names = "iface", "bus", "core";
149        dmas = <&cryptobam 2>, <&cryptobam 3>;
150        dma-names = "rx", "tx";
151        iommus = <&apps_smmu 0x584 0x0011>,
152                 <&apps_smmu 0x586 0x0011>,
153                 <&apps_smmu 0x594 0x0011>,
154                 <&apps_smmu 0x596 0x0011>;
155    };
156