1*c66ec88fSEmmanuel VadotQualcomm crypto engine driver 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotRequired properties: 4*c66ec88fSEmmanuel Vadot 5*c66ec88fSEmmanuel Vadot- compatible : should be "qcom,crypto-v5.1" 6*c66ec88fSEmmanuel Vadot- reg : specifies base physical address and size of the registers map 7*c66ec88fSEmmanuel Vadot- clocks : phandle to clock-controller plus clock-specifier pair 8*c66ec88fSEmmanuel Vadot- clock-names : "iface" clocks register interface 9*c66ec88fSEmmanuel Vadot "bus" clocks data transfer interface 10*c66ec88fSEmmanuel Vadot "core" clocks rest of the crypto block 11*c66ec88fSEmmanuel Vadot- dmas : DMA specifiers for tx and rx dma channels. For more see 12*c66ec88fSEmmanuel Vadot Documentation/devicetree/bindings/dma/dma.txt 13*c66ec88fSEmmanuel Vadot- dma-names : DMA request names should be "rx" and "tx" 14*c66ec88fSEmmanuel Vadot 15*c66ec88fSEmmanuel VadotExample: 16*c66ec88fSEmmanuel Vadot crypto@fd45a000 { 17*c66ec88fSEmmanuel Vadot compatible = "qcom,crypto-v5.1"; 18*c66ec88fSEmmanuel Vadot reg = <0xfd45a000 0x6000>; 19*c66ec88fSEmmanuel Vadot clocks = <&gcc GCC_CE2_AHB_CLK>, 20*c66ec88fSEmmanuel Vadot <&gcc GCC_CE2_AXI_CLK>, 21*c66ec88fSEmmanuel Vadot <&gcc GCC_CE2_CLK>; 22*c66ec88fSEmmanuel Vadot clock-names = "iface", "bus", "core"; 23*c66ec88fSEmmanuel Vadot dmas = <&cryptobam 2>, <&cryptobam 3>; 24*c66ec88fSEmmanuel Vadot dma-names = "rx", "tx"; 25*c66ec88fSEmmanuel Vadot }; 26