1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/cpufreq/qcom-cpufreq-nvmem.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm Technologies, Inc. NVMEM CPUFreq 8 9maintainers: 10 - Ilia Lin <ilia.lin@kernel.org> 11 12description: | 13 In certain Qualcomm Technologies, Inc. SoCs such as QCS404, The CPU supply 14 voltage is dynamically configured by Core Power Reduction (CPR) depending on 15 current CPU frequency and efuse values. 16 CPR provides a power domain with multiple levels that are selected depending 17 on the CPU OPP in use. The CPUFreq driver sets the CPR power domain level 18 according to the required OPPs defined in the CPU OPP tables. 19 20 For old implementation efuses are parsed to select the correct opp table and 21 voltage and CPR is not supported/used. 22 23select: 24 properties: 25 compatible: 26 contains: 27 enum: 28 - qcom,apq8064 29 - qcom,apq8096 30 - qcom,ipq8064 31 - qcom,msm8939 32 - qcom,msm8960 33 - qcom,msm8974 34 - qcom,msm8996 35 - qcom,qcs404 36 required: 37 - compatible 38 39patternProperties: 40 '^opp-table(-[a-z0-9]+)?$': 41 allOf: 42 - if: 43 properties: 44 compatible: 45 const: operating-points-v2-kryo-cpu 46 then: 47 $ref: /schemas/opp/opp-v2-kryo-cpu.yaml# 48 49 - if: 50 properties: 51 compatible: 52 const: operating-points-v2-qcom-level 53 then: 54 $ref: /schemas/opp/opp-v2-qcom-level.yaml# 55 56 unevaluatedProperties: false 57 58allOf: 59 - if: 60 properties: 61 compatible: 62 contains: 63 enum: 64 - qcom,qcs404 65 66 then: 67 properties: 68 cpus: 69 type: object 70 71 patternProperties: 72 '^cpu@[0-9a-f]+$': 73 type: object 74 75 properties: 76 power-domains: 77 maxItems: 1 78 79 power-domain-names: 80 items: 81 - const: cpr 82 83 required: 84 - power-domains 85 - power-domain-names 86 87 patternProperties: 88 '^opp-table(-[a-z0-9]+)?$': 89 if: 90 properties: 91 compatible: 92 const: operating-points-v2-kryo-cpu 93 then: 94 patternProperties: 95 '^opp-?[0-9]+$': 96 required: 97 - required-opps 98 99additionalProperties: true 100 101examples: 102 - | 103 / { 104 model = "Qualcomm Technologies, Inc. QCS404 EVB 1000"; 105 compatible = "qcom,qcs404-evb-1000", "qcom,qcs404-evb", "qcom,qcs404"; 106 #address-cells = <2>; 107 #size-cells = <2>; 108 109 cpus { 110 #address-cells = <1>; 111 #size-cells = <0>; 112 113 CPU0: cpu@100 { 114 device_type = "cpu"; 115 compatible = "arm,cortex-a53"; 116 reg = <0x100>; 117 enable-method = "psci"; 118 cpu-idle-states = <&CPU_SLEEP_0>; 119 next-level-cache = <&L2_0>; 120 #cooling-cells = <2>; 121 clocks = <&apcs_glb>; 122 operating-points-v2 = <&cpu_opp_table>; 123 power-domains = <&cpr>; 124 power-domain-names = "cpr"; 125 }; 126 127 CPU1: cpu@101 { 128 device_type = "cpu"; 129 compatible = "arm,cortex-a53"; 130 reg = <0x101>; 131 enable-method = "psci"; 132 cpu-idle-states = <&CPU_SLEEP_0>; 133 next-level-cache = <&L2_0>; 134 #cooling-cells = <2>; 135 clocks = <&apcs_glb>; 136 operating-points-v2 = <&cpu_opp_table>; 137 power-domains = <&cpr>; 138 power-domain-names = "cpr"; 139 }; 140 141 CPU2: cpu@102 { 142 device_type = "cpu"; 143 compatible = "arm,cortex-a53"; 144 reg = <0x102>; 145 enable-method = "psci"; 146 cpu-idle-states = <&CPU_SLEEP_0>; 147 next-level-cache = <&L2_0>; 148 #cooling-cells = <2>; 149 clocks = <&apcs_glb>; 150 operating-points-v2 = <&cpu_opp_table>; 151 power-domains = <&cpr>; 152 power-domain-names = "cpr"; 153 }; 154 155 CPU3: cpu@103 { 156 device_type = "cpu"; 157 compatible = "arm,cortex-a53"; 158 reg = <0x103>; 159 enable-method = "psci"; 160 cpu-idle-states = <&CPU_SLEEP_0>; 161 next-level-cache = <&L2_0>; 162 #cooling-cells = <2>; 163 clocks = <&apcs_glb>; 164 operating-points-v2 = <&cpu_opp_table>; 165 power-domains = <&cpr>; 166 power-domain-names = "cpr"; 167 }; 168 }; 169 170 cpu_opp_table: opp-table-cpu { 171 compatible = "operating-points-v2-kryo-cpu"; 172 opp-shared; 173 174 opp-1094400000 { 175 opp-hz = /bits/ 64 <1094400000>; 176 required-opps = <&cpr_opp1>; 177 }; 178 opp-1248000000 { 179 opp-hz = /bits/ 64 <1248000000>; 180 required-opps = <&cpr_opp2>; 181 }; 182 opp-1401600000 { 183 opp-hz = /bits/ 64 <1401600000>; 184 required-opps = <&cpr_opp3>; 185 }; 186 }; 187 188 cpr_opp_table: opp-table-cpr { 189 compatible = "operating-points-v2-qcom-level"; 190 191 cpr_opp1: opp1 { 192 opp-level = <1>; 193 qcom,opp-fuse-level = <1>; 194 }; 195 cpr_opp2: opp2 { 196 opp-level = <2>; 197 qcom,opp-fuse-level = <2>; 198 }; 199 cpr_opp3: opp3 { 200 opp-level = <3>; 201 qcom,opp-fuse-level = <3>; 202 }; 203 }; 204 }; 205