1*c66ec88fSEmmanuel VadotDevice Tree Clock bindings for ZTE zx296718 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotThis binding uses the common clock binding[1]. 4*c66ec88fSEmmanuel Vadot 5*c66ec88fSEmmanuel Vadot[1] Documentation/devicetree/bindings/clock/clock-bindings.txt 6*c66ec88fSEmmanuel Vadot 7*c66ec88fSEmmanuel VadotRequired properties: 8*c66ec88fSEmmanuel Vadot- compatible : shall be one of the following: 9*c66ec88fSEmmanuel Vadot "zte,zx296718-topcrm": 10*c66ec88fSEmmanuel Vadot zx296718 top clock selection, divider and gating 11*c66ec88fSEmmanuel Vadot 12*c66ec88fSEmmanuel Vadot "zte,zx296718-lsp0crm" and 13*c66ec88fSEmmanuel Vadot "zte,zx296718-lsp1crm": 14*c66ec88fSEmmanuel Vadot zx296718 device level clock selection and gating 15*c66ec88fSEmmanuel Vadot 16*c66ec88fSEmmanuel Vadot "zte,zx296718-audiocrm": 17*c66ec88fSEmmanuel Vadot zx296718 audio clock selection, divider and gating 18*c66ec88fSEmmanuel Vadot 19*c66ec88fSEmmanuel Vadot- reg: Address and length of the register set 20*c66ec88fSEmmanuel Vadot 21*c66ec88fSEmmanuel VadotThe clock consumer should specify the desired clock by having the clock 22*c66ec88fSEmmanuel VadotID in its "clocks" phandle cell. See include/dt-bindings/clock/zx296718-clock.h 23*c66ec88fSEmmanuel Vadotfor the full list of zx296718 clock IDs. 24*c66ec88fSEmmanuel Vadot 25*c66ec88fSEmmanuel Vadot 26*c66ec88fSEmmanuel Vadottopclk: topcrm@1461000 { 27*c66ec88fSEmmanuel Vadot compatible = "zte,zx296718-topcrm-clk"; 28*c66ec88fSEmmanuel Vadot reg = <0x01461000 0x1000>; 29*c66ec88fSEmmanuel Vadot #clock-cells = <1>; 30*c66ec88fSEmmanuel Vadot}; 31*c66ec88fSEmmanuel Vadot 32*c66ec88fSEmmanuel Vadotusbphy0:usb-phy0 { 33*c66ec88fSEmmanuel Vadot compatible = "zte,zx296718-usb-phy"; 34*c66ec88fSEmmanuel Vadot #phy-cells = <0>; 35*c66ec88fSEmmanuel Vadot clocks = <&topclk USB20_PHY_CLK>; 36*c66ec88fSEmmanuel Vadot clock-names = "phyclk"; 37*c66ec88fSEmmanuel Vadot}; 38