1* Sigma Designs Tango4 Clock Generator 2 3The Tango4 clock generator outputs cpu_clk and sys_clk (the latter is used 4for RAM and various peripheral devices). The clock binding described here 5is applicable to all Tango4 SoCs. 6 7Required Properties: 8 9- compatible: should be "sigma,tango4-clkgen". 10- reg: physical base address of the device and length of memory mapped region. 11- clocks: phandle of the input clock (crystal oscillator). 12- clock-output-names: should be "cpuclk" and "sysclk". 13- #clock-cells: should be set to 1. 14 15Example: 16 17 clkgen: clkgen@10000 { 18 compatible = "sigma,tango4-clkgen"; 19 reg = <0x10000 0x40>; 20 clocks = <&xtal>; 21 clock-output-names = "cpuclk", "sysclk"; 22 #clock-cells = <1>; 23 }; 24