1*c66ec88fSEmmanuel VadotBinding for a ST multiplexed clock driver. 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotThis binding supports only simple indexed multiplexers, it does not 4*c66ec88fSEmmanuel Vadotsupport table based parent index to hardware value translations. 5*c66ec88fSEmmanuel Vadot 6*c66ec88fSEmmanuel VadotThis binding uses the common clock binding[1]. 7*c66ec88fSEmmanuel Vadot 8*c66ec88fSEmmanuel Vadot[1] Documentation/devicetree/bindings/clock/clock-bindings.txt 9*c66ec88fSEmmanuel Vadot 10*c66ec88fSEmmanuel VadotRequired properties: 11*c66ec88fSEmmanuel Vadot 12*c66ec88fSEmmanuel Vadot- compatible : shall be: 13*c66ec88fSEmmanuel Vadot "st,stih407-clkgen-a9-mux" 14*c66ec88fSEmmanuel Vadot 15*c66ec88fSEmmanuel Vadot- #clock-cells : from common clock binding; shall be set to 0. 16*c66ec88fSEmmanuel Vadot 17*c66ec88fSEmmanuel Vadot- reg : A Base address and length of the register set. 18*c66ec88fSEmmanuel Vadot 19*c66ec88fSEmmanuel Vadot- clocks : from common clock binding 20*c66ec88fSEmmanuel Vadot 21*c66ec88fSEmmanuel VadotExample: 22*c66ec88fSEmmanuel Vadot 23*c66ec88fSEmmanuel Vadot clk_m_a9: clk-m-a9@92b0000 { 24*c66ec88fSEmmanuel Vadot #clock-cells = <0>; 25*c66ec88fSEmmanuel Vadot compatible = "st,stih407-clkgen-a9-mux"; 26*c66ec88fSEmmanuel Vadot reg = <0x92b0000 0x10000>; 27*c66ec88fSEmmanuel Vadot 28*c66ec88fSEmmanuel Vadot clocks = <&clockgen_a9_pll 0>, 29*c66ec88fSEmmanuel Vadot <&clockgen_a9_pll 0>, 30*c66ec88fSEmmanuel Vadot <&clk_s_c0_flexgen 13>, 31*c66ec88fSEmmanuel Vadot <&clk_m_a9_ext2f_div2>; 32*c66ec88fSEmmanuel Vadot }; 33