xref: /freebsd/sys/contrib/device-tree/Bindings/clock/st,nomadik.txt (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71)
1*c66ec88fSEmmanuel VadotST Microelectronics Nomadik SRC System Reset and Control
2*c66ec88fSEmmanuel Vadot
3*c66ec88fSEmmanuel VadotThis binding uses the common clock binding:
4*c66ec88fSEmmanuel VadotDocumentation/devicetree/bindings/clock/clock-bindings.txt
5*c66ec88fSEmmanuel Vadot
6*c66ec88fSEmmanuel VadotThe Nomadik SRC controller is responsible of controlling chrystals,
7*c66ec88fSEmmanuel VadotPLLs and clock gates.
8*c66ec88fSEmmanuel Vadot
9*c66ec88fSEmmanuel VadotRequired properties for the SRC node:
10*c66ec88fSEmmanuel Vadot- compatible: must be "stericsson,nomadik-src"
11*c66ec88fSEmmanuel Vadot- reg: must contain the SRC register base and size
12*c66ec88fSEmmanuel Vadot
13*c66ec88fSEmmanuel VadotOptional properties for the SRC node:
14*c66ec88fSEmmanuel Vadot- disable-sxtalo: if present this will disable the SXTALO
15*c66ec88fSEmmanuel Vadot  i.e. the driver output for the slow 32kHz chrystal, if the
16*c66ec88fSEmmanuel Vadot  board has its own circuitry for providing this oscillator
17*c66ec88fSEmmanuel Vadot- disable-mxtal: if present this will disable the MXTALO,
18*c66ec88fSEmmanuel Vadot  i.e. the driver output for the main (~19.2 MHz) chrystal,
19*c66ec88fSEmmanuel Vadot  if the board has its own circuitry for providing this
20*c66ec88fSEmmanuel Vadot  oscillator
21*c66ec88fSEmmanuel Vadot
22*c66ec88fSEmmanuel Vadot
23*c66ec88fSEmmanuel VadotPLL nodes: these nodes represent the two PLLs on the system,
24*c66ec88fSEmmanuel Vadotwhich should both have the main chrystal, represented as a
25*c66ec88fSEmmanuel Vadotfixed frequency clock, as parent.
26*c66ec88fSEmmanuel Vadot
27*c66ec88fSEmmanuel VadotRequired properties for the two PLL nodes:
28*c66ec88fSEmmanuel Vadot- compatible: must be "st,nomadik-pll-clock"
29*c66ec88fSEmmanuel Vadot- clock-cells: must be 0
30*c66ec88fSEmmanuel Vadot- clock-id: must be 1 or 2 for PLL1 and PLL2 respectively
31*c66ec88fSEmmanuel Vadot- clocks: this clock will have main chrystal as parent
32*c66ec88fSEmmanuel Vadot
33*c66ec88fSEmmanuel Vadot
34*c66ec88fSEmmanuel VadotHCLK nodes: these represent the clock gates on individual
35*c66ec88fSEmmanuel Vadotlines from the HCLK clock tree and the gate for individual
36*c66ec88fSEmmanuel Vadotlines from the PCLK clock tree.
37*c66ec88fSEmmanuel Vadot
38*c66ec88fSEmmanuel VadotRequires properties for the HCLK nodes:
39*c66ec88fSEmmanuel Vadot- compatible: must be "st,nomadik-hclk-clock"
40*c66ec88fSEmmanuel Vadot- clock-cells: must be 0
41*c66ec88fSEmmanuel Vadot- clock-id: must be the clock ID from 0 to 63 according to
42*c66ec88fSEmmanuel Vadot  this table:
43*c66ec88fSEmmanuel Vadot
44*c66ec88fSEmmanuel Vadot	0:  HCLKDMA0
45*c66ec88fSEmmanuel Vadot	1:  HCLKSMC
46*c66ec88fSEmmanuel Vadot	2:  HCLKSDRAM
47*c66ec88fSEmmanuel Vadot	3:  HCLKDMA1
48*c66ec88fSEmmanuel Vadot	4:  HCLKCLCD
49*c66ec88fSEmmanuel Vadot	5:  PCLKIRDA
50*c66ec88fSEmmanuel Vadot	6:  PCLKSSP
51*c66ec88fSEmmanuel Vadot	7:  PCLKUART0
52*c66ec88fSEmmanuel Vadot	8:  PCLKSDI
53*c66ec88fSEmmanuel Vadot	9:  PCLKI2C0
54*c66ec88fSEmmanuel Vadot	10: PCLKI2C1
55*c66ec88fSEmmanuel Vadot	11: PCLKUART1
56*c66ec88fSEmmanuel Vadot	12: PCLMSP0
57*c66ec88fSEmmanuel Vadot	13: HCLKUSB
58*c66ec88fSEmmanuel Vadot	14: HCLKDIF
59*c66ec88fSEmmanuel Vadot	15: HCLKSAA
60*c66ec88fSEmmanuel Vadot	16: HCLKSVA
61*c66ec88fSEmmanuel Vadot	17: PCLKHSI
62*c66ec88fSEmmanuel Vadot	18: PCLKXTI
63*c66ec88fSEmmanuel Vadot	19: PCLKUART2
64*c66ec88fSEmmanuel Vadot	20: PCLKMSP1
65*c66ec88fSEmmanuel Vadot	21: PCLKMSP2
66*c66ec88fSEmmanuel Vadot	22: PCLKOWM
67*c66ec88fSEmmanuel Vadot	23: HCLKHPI
68*c66ec88fSEmmanuel Vadot	24: PCLKSKE
69*c66ec88fSEmmanuel Vadot	25: PCLKHSEM
70*c66ec88fSEmmanuel Vadot	26: HCLK3D
71*c66ec88fSEmmanuel Vadot	27: HCLKHASH
72*c66ec88fSEmmanuel Vadot	28: HCLKCRYP
73*c66ec88fSEmmanuel Vadot	29: PCLKMSHC
74*c66ec88fSEmmanuel Vadot	30: HCLKUSBM
75*c66ec88fSEmmanuel Vadot	31: HCLKRNG
76*c66ec88fSEmmanuel Vadot	(32, 33, 34, 35 RESERVED)
77*c66ec88fSEmmanuel Vadot	36: CLDCLK
78*c66ec88fSEmmanuel Vadot	37: IRDACLK
79*c66ec88fSEmmanuel Vadot	38: SSPICLK
80*c66ec88fSEmmanuel Vadot	39: UART0CLK
81*c66ec88fSEmmanuel Vadot	40: SDICLK
82*c66ec88fSEmmanuel Vadot	41: I2C0CLK
83*c66ec88fSEmmanuel Vadot	42: I2C1CLK
84*c66ec88fSEmmanuel Vadot	43: UART1CLK
85*c66ec88fSEmmanuel Vadot	44: MSPCLK0
86*c66ec88fSEmmanuel Vadot	45: USBCLK
87*c66ec88fSEmmanuel Vadot	46: DIFCLK
88*c66ec88fSEmmanuel Vadot	47: IPI2CCLK
89*c66ec88fSEmmanuel Vadot	48: IPBMCCLK
90*c66ec88fSEmmanuel Vadot	49: HSICLKRX
91*c66ec88fSEmmanuel Vadot	50: HSICLKTX
92*c66ec88fSEmmanuel Vadot	51: UART2CLK
93*c66ec88fSEmmanuel Vadot	52: MSPCLK1
94*c66ec88fSEmmanuel Vadot	53: MSPCLK2
95*c66ec88fSEmmanuel Vadot	54: OWMCLK
96*c66ec88fSEmmanuel Vadot	(55 RESERVED)
97*c66ec88fSEmmanuel Vadot	56: SKECLK
98*c66ec88fSEmmanuel Vadot	(57 RESERVED)
99*c66ec88fSEmmanuel Vadot	58: 3DCLK
100*c66ec88fSEmmanuel Vadot	59: PCLKMSP3
101*c66ec88fSEmmanuel Vadot	60: MSPCLK3
102*c66ec88fSEmmanuel Vadot	61: MSHCCLK
103*c66ec88fSEmmanuel Vadot	62: USBMCLK
104*c66ec88fSEmmanuel Vadot	63: RNGCCLK
105