xref: /freebsd/sys/contrib/device-tree/Bindings/clock/st,stm32-rcc.yaml (revision 2846c90520eb4cc74e24d586a0ea0f4a0006bc73)
1*2846c905SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*2846c905SEmmanuel Vadot%YAML 1.2
3*2846c905SEmmanuel Vadot---
4*2846c905SEmmanuel Vadot$id: http://devicetree.org/schemas/clock/st,stm32-rcc.yaml#
5*2846c905SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml#
6*2846c905SEmmanuel Vadot
7*2846c905SEmmanuel Vadottitle: STMicroelectronics STM32 Reset Clock Controller
8*2846c905SEmmanuel Vadot
9*2846c905SEmmanuel Vadotmaintainers:
10*2846c905SEmmanuel Vadot  - Dario Binacchi <dario.binacchi@amarulasolutions.com>
11*2846c905SEmmanuel Vadot
12*2846c905SEmmanuel Vadotdescription: |
13*2846c905SEmmanuel Vadot  The RCC IP is both a reset and a clock controller.
14*2846c905SEmmanuel Vadot  The reset phandle argument is the bit number within the RCC registers bank,
15*2846c905SEmmanuel Vadot  starting from RCC base address.
16*2846c905SEmmanuel Vadot
17*2846c905SEmmanuel Vadotproperties:
18*2846c905SEmmanuel Vadot  compatible:
19*2846c905SEmmanuel Vadot    oneOf:
20*2846c905SEmmanuel Vadot      - items:
21*2846c905SEmmanuel Vadot          - enum:
22*2846c905SEmmanuel Vadot              - st,stm32f42xx-rcc
23*2846c905SEmmanuel Vadot              - st,stm32f746-rcc
24*2846c905SEmmanuel Vadot              - st,stm32h743-rcc
25*2846c905SEmmanuel Vadot          - const: st,stm32-rcc
26*2846c905SEmmanuel Vadot      - items:
27*2846c905SEmmanuel Vadot          - enum:
28*2846c905SEmmanuel Vadot              - st,stm32f469-rcc
29*2846c905SEmmanuel Vadot          - const: st,stm32f42xx-rcc
30*2846c905SEmmanuel Vadot          - const: st,stm32-rcc
31*2846c905SEmmanuel Vadot      - items:
32*2846c905SEmmanuel Vadot          - enum:
33*2846c905SEmmanuel Vadot              - st,stm32f769-rcc
34*2846c905SEmmanuel Vadot          - const: st,stm32f746-rcc
35*2846c905SEmmanuel Vadot          - const: st,stm32-rcc
36*2846c905SEmmanuel Vadot
37*2846c905SEmmanuel Vadot  reg:
38*2846c905SEmmanuel Vadot    maxItems: 1
39*2846c905SEmmanuel Vadot
40*2846c905SEmmanuel Vadot  '#reset-cells':
41*2846c905SEmmanuel Vadot    const: 1
42*2846c905SEmmanuel Vadot
43*2846c905SEmmanuel Vadot  '#clock-cells':
44*2846c905SEmmanuel Vadot    enum: [1, 2]
45*2846c905SEmmanuel Vadot
46*2846c905SEmmanuel Vadot  clocks:
47*2846c905SEmmanuel Vadot    minItems: 2
48*2846c905SEmmanuel Vadot    maxItems: 3
49*2846c905SEmmanuel Vadot
50*2846c905SEmmanuel Vadot  st,syscfg:
51*2846c905SEmmanuel Vadot    $ref: /schemas/types.yaml#/definitions/phandle
52*2846c905SEmmanuel Vadot    description:
53*2846c905SEmmanuel Vadot      Phandle to system configuration controller. It can be used to control the
54*2846c905SEmmanuel Vadot      power domain circuitry.
55*2846c905SEmmanuel Vadot
56*2846c905SEmmanuel Vadot  st,ssc-modfreq-hz:
57*2846c905SEmmanuel Vadot    description:
58*2846c905SEmmanuel Vadot      The modulation frequency for main PLL (in Hz)
59*2846c905SEmmanuel Vadot
60*2846c905SEmmanuel Vadot  st,ssc-moddepth-permyriad:
61*2846c905SEmmanuel Vadot    $ref: /schemas/types.yaml#/definitions/uint32
62*2846c905SEmmanuel Vadot    description:
63*2846c905SEmmanuel Vadot      The modulation rate for main PLL (in permyriad, i.e. 0.01%)
64*2846c905SEmmanuel Vadot    minimum: 25
65*2846c905SEmmanuel Vadot    maximum: 200
66*2846c905SEmmanuel Vadot
67*2846c905SEmmanuel Vadot  st,ssc-modmethod:
68*2846c905SEmmanuel Vadot    $ref: /schemas/types.yaml#/definitions/string
69*2846c905SEmmanuel Vadot    description:
70*2846c905SEmmanuel Vadot      The modulation techniques for main PLL.
71*2846c905SEmmanuel Vadot    items:
72*2846c905SEmmanuel Vadot      enum:
73*2846c905SEmmanuel Vadot        - center-spread
74*2846c905SEmmanuel Vadot        - down-spread
75*2846c905SEmmanuel Vadot
76*2846c905SEmmanuel Vadotrequired:
77*2846c905SEmmanuel Vadot  - compatible
78*2846c905SEmmanuel Vadot  - reg
79*2846c905SEmmanuel Vadot  - '#reset-cells'
80*2846c905SEmmanuel Vadot  - '#clock-cells'
81*2846c905SEmmanuel Vadot  - clocks
82*2846c905SEmmanuel Vadot  - st,syscfg
83*2846c905SEmmanuel Vadot
84*2846c905SEmmanuel VadotallOf:
85*2846c905SEmmanuel Vadot  - if:
86*2846c905SEmmanuel Vadot      properties:
87*2846c905SEmmanuel Vadot        compatible:
88*2846c905SEmmanuel Vadot          contains:
89*2846c905SEmmanuel Vadot            const: st,stm32h743-rcc
90*2846c905SEmmanuel Vadot    then:
91*2846c905SEmmanuel Vadot      properties:
92*2846c905SEmmanuel Vadot        '#clock-cells':
93*2846c905SEmmanuel Vadot          const: 1
94*2846c905SEmmanuel Vadot          description: |
95*2846c905SEmmanuel Vadot            The clock index for the specified type.
96*2846c905SEmmanuel Vadot        clocks:
97*2846c905SEmmanuel Vadot          items:
98*2846c905SEmmanuel Vadot            - description: high speed external (HSE) clock input
99*2846c905SEmmanuel Vadot            - description: low speed external (LSE) clock input
100*2846c905SEmmanuel Vadot            - description: Inter-IC sound (I2S) clock input
101*2846c905SEmmanuel Vadot        st,ssc-modfreq-hz: false
102*2846c905SEmmanuel Vadot        st,ssc-moddepth-permyriad: false
103*2846c905SEmmanuel Vadot        st,ssc-modmethod: false
104*2846c905SEmmanuel Vadot
105*2846c905SEmmanuel Vadot    else:
106*2846c905SEmmanuel Vadot      properties:
107*2846c905SEmmanuel Vadot        '#clock-cells':
108*2846c905SEmmanuel Vadot          const: 2
109*2846c905SEmmanuel Vadot          description: |
110*2846c905SEmmanuel Vadot            - The first cell is the clock type, possible values are 0 for
111*2846c905SEmmanuel Vadot              gated clocks and 1 otherwise.
112*2846c905SEmmanuel Vadot            - The second cell is the clock index for the specified type.
113*2846c905SEmmanuel Vadot        clocks:
114*2846c905SEmmanuel Vadot          items:
115*2846c905SEmmanuel Vadot            - description: high speed external (HSE) clock input
116*2846c905SEmmanuel Vadot            - description: Inter-IC sound (I2S) clock input
117*2846c905SEmmanuel Vadot
118*2846c905SEmmanuel VadotadditionalProperties: false
119*2846c905SEmmanuel Vadot
120*2846c905SEmmanuel Vadotexamples:
121*2846c905SEmmanuel Vadot  # Reset and Clock Control Module node:
122*2846c905SEmmanuel Vadot  - |
123*2846c905SEmmanuel Vadot    clock-controller@40023800 {
124*2846c905SEmmanuel Vadot        compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";
125*2846c905SEmmanuel Vadot        reg = <0x40023800 0x400>;
126*2846c905SEmmanuel Vadot        #clock-cells = <2>;
127*2846c905SEmmanuel Vadot        #reset-cells = <1>;
128*2846c905SEmmanuel Vadot        clocks = <&clk_hse>, <&clk_i2s_ckin>;
129*2846c905SEmmanuel Vadot        st,syscfg = <&pwrcfg>;
130*2846c905SEmmanuel Vadot        st,ssc-modfreq-hz = <10000>;
131*2846c905SEmmanuel Vadot        st,ssc-moddepth-permyriad = <200>;
132*2846c905SEmmanuel Vadot        st,ssc-modmethod = "center-spread";
133*2846c905SEmmanuel Vadot    };
134*2846c905SEmmanuel Vadot  - |
135*2846c905SEmmanuel Vadot    clock-controller@58024400 {
136*2846c905SEmmanuel Vadot        compatible = "st,stm32h743-rcc", "st,stm32-rcc";
137*2846c905SEmmanuel Vadot        reg = <0x58024400 0x400>;
138*2846c905SEmmanuel Vadot        #clock-cells = <1>;
139*2846c905SEmmanuel Vadot        #reset-cells = <1>;
140*2846c905SEmmanuel Vadot        clocks = <&clk_hse>, <&clk_lse>, <&clk_i2s>;
141*2846c905SEmmanuel Vadot        st,syscfg = <&pwrcfg>;
142*2846c905SEmmanuel Vadot    };
143*2846c905SEmmanuel Vadot
144*2846c905SEmmanuel Vadot...
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