xref: /freebsd/sys/contrib/device-tree/Bindings/clock/sprd,sc9863a-clk.yaml (revision dc318a4ffabcbfa23bb56a33403aad36e6de30af) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2# Copyright 2019 Unisoc Inc.
3%YAML 1.2
4---
5$id: "http://devicetree.org/schemas/clock/sprd,sc9863a-clk.yaml#"
6$schema: "http://devicetree.org/meta-schemas/core.yaml#"
7
8title: SC9863A Clock Control Unit Device Tree Bindings
9
10maintainers:
11  - Orson Zhai <orsonzhai@gmail.com>
12  - Baolin Wang <baolin.wang7@gmail.com>
13  - Chunyan Zhang <zhang.lyra@gmail.com>
14
15properties:
16  "#clock-cells":
17    const: 1
18
19  compatible:
20    enum:
21      - sprd,sc9863a-ap-clk
22      - sprd,sc9863a-aon-clk
23      - sprd,sc9863a-apahb-gate
24      - sprd,sc9863a-pmu-gate
25      - sprd,sc9863a-aonapb-gate
26      - sprd,sc9863a-pll
27      - sprd,sc9863a-mpll
28      - sprd,sc9863a-rpll
29      - sprd,sc9863a-dpll
30      - sprd,sc9863a-mm-gate
31      - sprd,sc9863a-mm-clk
32      - sprd,sc9863a-apapb-gate
33
34  clocks:
35    minItems: 1
36    maxItems: 4
37    description: |
38      The input parent clock(s) phandle for this clock, only list fixed
39      clocks which are declared in devicetree.
40
41  clock-names:
42    minItems: 1
43    maxItems: 4
44    items:
45      - const: ext-26m
46      - const: ext-32k
47      - const: ext-4m
48      - const: rco-100m
49
50  reg:
51    maxItems: 1
52
53required:
54  - compatible
55  - '#clock-cells'
56
57if:
58  properties:
59    compatible:
60      enum:
61        - sprd,sc9863a-ap-clk
62        - sprd,sc9863a-aon-clk
63then:
64  required:
65    - reg
66
67else:
68  description: |
69    Other SC9863a clock nodes should be the child of a syscon node in
70    which compatible string shoule be:
71            "sprd,sc9863a-glbregs", "syscon", "simple-mfd"
72
73    The 'reg' property for the clock node is also required if there is a sub
74    range of registers for the clocks.
75
76additionalProperties: false
77
78examples:
79  - |
80    ap_clk: clock-controller@21500000 {
81      compatible = "sprd,sc9863a-ap-clk";
82      reg = <0x21500000 0x1000>;
83      clocks = <&ext_26m>, <&ext_32k>;
84      clock-names = "ext-26m", "ext-32k";
85      #clock-cells = <1>;
86    };
87
88  - |
89    syscon@20e00000 {
90      compatible = "sprd,sc9863a-glbregs", "syscon", "simple-mfd";
91      reg = <0x20e00000 0x4000>;
92      #address-cells = <1>;
93      #size-cells = <1>;
94      ranges = <0 0x20e00000 0x4000>;
95
96      apahb_gate: apahb-gate@0 {
97        compatible = "sprd,sc9863a-apahb-gate";
98        reg = <0x0 0x1020>;
99        #clock-cells = <1>;
100      };
101    };
102
103...
104