1# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/clock/rockchip,rv1126-cru.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Rockchip RV1126 Clock and Reset Unit 8 9maintainers: 10 - Jagan Teki <jagan@edgeble.ai> 11 - Finley Xiao <finley.xiao@rock-chips.com> 12 - Heiko Stuebner <heiko@sntech.de> 13 14description: 15 The RV1126 clock controller generates the clock and also implements a 16 reset controller for SoC peripherals. 17 18properties: 19 compatible: 20 enum: 21 - rockchip,rv1126-cru 22 - rockchip,rv1126-pmucru 23 24 reg: 25 maxItems: 1 26 27 "#clock-cells": 28 const: 1 29 30 "#reset-cells": 31 const: 1 32 33 clocks: 34 maxItems: 1 35 36 clock-names: 37 const: xin24m 38 39 rockchip,grf: 40 $ref: /schemas/types.yaml#/definitions/phandle 41 description: 42 Phandle to the syscon managing the "general register files" (GRF), 43 if missing pll rates are not changeable, due to the missing pll 44 lock status. 45 46required: 47 - compatible 48 - reg 49 - "#clock-cells" 50 - "#reset-cells" 51 52additionalProperties: false 53 54examples: 55 - | 56 cru: clock-controller@ff490000 { 57 compatible = "rockchip,rv1126-cru"; 58 reg = <0xff490000 0x1000>; 59 rockchip,grf = <&grf>; 60 #clock-cells = <1>; 61 #reset-cells = <1>; 62 }; 63