1*8ccc0d23SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*8ccc0d23SEmmanuel Vadot%YAML 1.2 3*8ccc0d23SEmmanuel Vadot--- 4*8ccc0d23SEmmanuel Vadot$id: http://devicetree.org/schemas/clock/rockchip,rk3528-cru.yaml# 5*8ccc0d23SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*8ccc0d23SEmmanuel Vadot 7*8ccc0d23SEmmanuel Vadottitle: Rockchip RK3528 Clock and Reset Controller 8*8ccc0d23SEmmanuel Vadot 9*8ccc0d23SEmmanuel Vadotmaintainers: 10*8ccc0d23SEmmanuel Vadot - Yao Zi <ziyao@disroot.org> 11*8ccc0d23SEmmanuel Vadot 12*8ccc0d23SEmmanuel Vadotdescription: | 13*8ccc0d23SEmmanuel Vadot The RK3528 clock controller generates the clock and also implements a reset 14*8ccc0d23SEmmanuel Vadot controller for SoC peripherals. For example, it provides SCLK_UART0 and 15*8ccc0d23SEmmanuel Vadot PCLK_UART0 as well as SRST_P_UART0 and SRST_S_UART0 for the first UART 16*8ccc0d23SEmmanuel Vadot module. 17*8ccc0d23SEmmanuel Vadot Each clock is assigned an identifier, consumer nodes can use it to specify 18*8ccc0d23SEmmanuel Vadot the clock. All available clock and reset IDs are defined in dt-binding 19*8ccc0d23SEmmanuel Vadot headers. 20*8ccc0d23SEmmanuel Vadot 21*8ccc0d23SEmmanuel Vadotproperties: 22*8ccc0d23SEmmanuel Vadot compatible: 23*8ccc0d23SEmmanuel Vadot const: rockchip,rk3528-cru 24*8ccc0d23SEmmanuel Vadot 25*8ccc0d23SEmmanuel Vadot reg: 26*8ccc0d23SEmmanuel Vadot maxItems: 1 27*8ccc0d23SEmmanuel Vadot 28*8ccc0d23SEmmanuel Vadot clocks: 29*8ccc0d23SEmmanuel Vadot items: 30*8ccc0d23SEmmanuel Vadot - description: External 24MHz oscillator clock 31*8ccc0d23SEmmanuel Vadot - description: > 32*8ccc0d23SEmmanuel Vadot 50MHz clock generated by PHY module, for generating GMAC0 clocks only. 33*8ccc0d23SEmmanuel Vadot 34*8ccc0d23SEmmanuel Vadot clock-names: 35*8ccc0d23SEmmanuel Vadot items: 36*8ccc0d23SEmmanuel Vadot - const: xin24m 37*8ccc0d23SEmmanuel Vadot - const: gmac0 38*8ccc0d23SEmmanuel Vadot 39*8ccc0d23SEmmanuel Vadot "#clock-cells": 40*8ccc0d23SEmmanuel Vadot const: 1 41*8ccc0d23SEmmanuel Vadot 42*8ccc0d23SEmmanuel Vadot "#reset-cells": 43*8ccc0d23SEmmanuel Vadot const: 1 44*8ccc0d23SEmmanuel Vadot 45*8ccc0d23SEmmanuel Vadotrequired: 46*8ccc0d23SEmmanuel Vadot - compatible 47*8ccc0d23SEmmanuel Vadot - reg 48*8ccc0d23SEmmanuel Vadot - clocks 49*8ccc0d23SEmmanuel Vadot - clock-names 50*8ccc0d23SEmmanuel Vadot - "#clock-cells" 51*8ccc0d23SEmmanuel Vadot - "#reset-cells" 52*8ccc0d23SEmmanuel Vadot 53*8ccc0d23SEmmanuel VadotadditionalProperties: false 54*8ccc0d23SEmmanuel Vadot 55*8ccc0d23SEmmanuel Vadotexamples: 56*8ccc0d23SEmmanuel Vadot - | 57*8ccc0d23SEmmanuel Vadot clock-controller@ff4a0000 { 58*8ccc0d23SEmmanuel Vadot compatible = "rockchip,rk3528-cru"; 59*8ccc0d23SEmmanuel Vadot reg = <0xff4a0000 0x30000>; 60*8ccc0d23SEmmanuel Vadot clocks = <&xin24m>, <&gmac0_clk>; 61*8ccc0d23SEmmanuel Vadot clock-names = "xin24m", "gmac0"; 62*8ccc0d23SEmmanuel Vadot #clock-cells = <1>; 63*8ccc0d23SEmmanuel Vadot #reset-cells = <1>; 64*8ccc0d23SEmmanuel Vadot }; 65