1*7ef62cebSEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2d5b0e70fSEmmanuel Vadot%YAML 1.2 3d5b0e70fSEmmanuel Vadot--- 4d5b0e70fSEmmanuel Vadot$id: http://devicetree.org/schemas/clock/rockchip,rk3036-cru.yaml# 5d5b0e70fSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6d5b0e70fSEmmanuel Vadot 7d5b0e70fSEmmanuel Vadottitle: Rockchip RK3036 Clock and Reset Unit (CRU) 8d5b0e70fSEmmanuel Vadot 9d5b0e70fSEmmanuel Vadotmaintainers: 10d5b0e70fSEmmanuel Vadot - Elaine Zhang <zhangqing@rock-chips.com> 11d5b0e70fSEmmanuel Vadot - Heiko Stuebner <heiko@sntech.de> 12d5b0e70fSEmmanuel Vadot 13d5b0e70fSEmmanuel Vadotdescription: | 14d5b0e70fSEmmanuel Vadot The RK3036 clock controller generates and supplies clocks to various 15d5b0e70fSEmmanuel Vadot controllers within the SoC and also implements a reset controller for SoC 16d5b0e70fSEmmanuel Vadot peripherals. 17d5b0e70fSEmmanuel Vadot Each clock is assigned an identifier and client nodes can use this identifier 18d5b0e70fSEmmanuel Vadot to specify the clock which they consume. All available clocks are defined as 19d5b0e70fSEmmanuel Vadot preprocessor macros in the dt-bindings/clock/rk3036-cru.h headers and can be 20d5b0e70fSEmmanuel Vadot used in device tree sources. Similar macros exist for the reset sources in 21d5b0e70fSEmmanuel Vadot these files. 22d5b0e70fSEmmanuel Vadot There are several clocks that are generated outside the SoC. It is expected 23d5b0e70fSEmmanuel Vadot that they are defined using standard clock bindings with following 24d5b0e70fSEmmanuel Vadot clock-output-names: 25d5b0e70fSEmmanuel Vadot - "xin24m" - crystal input - required 26d5b0e70fSEmmanuel Vadot - "ext_i2s" - external I2S clock - optional 27d5b0e70fSEmmanuel Vadot - "rmii_clkin" - external EMAC clock - optional 28d5b0e70fSEmmanuel Vadot 29d5b0e70fSEmmanuel Vadotproperties: 30d5b0e70fSEmmanuel Vadot compatible: 31d5b0e70fSEmmanuel Vadot enum: 32d5b0e70fSEmmanuel Vadot - rockchip,rk3036-cru 33d5b0e70fSEmmanuel Vadot 34d5b0e70fSEmmanuel Vadot reg: 35d5b0e70fSEmmanuel Vadot maxItems: 1 36d5b0e70fSEmmanuel Vadot 37d5b0e70fSEmmanuel Vadot "#clock-cells": 38d5b0e70fSEmmanuel Vadot const: 1 39d5b0e70fSEmmanuel Vadot 40d5b0e70fSEmmanuel Vadot "#reset-cells": 41d5b0e70fSEmmanuel Vadot const: 1 42d5b0e70fSEmmanuel Vadot 43d5b0e70fSEmmanuel Vadot clocks: 44d5b0e70fSEmmanuel Vadot maxItems: 1 45d5b0e70fSEmmanuel Vadot 46d5b0e70fSEmmanuel Vadot clock-names: 47d5b0e70fSEmmanuel Vadot const: xin24m 48d5b0e70fSEmmanuel Vadot 49d5b0e70fSEmmanuel Vadot rockchip,grf: 50d5b0e70fSEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/phandle 51d5b0e70fSEmmanuel Vadot description: 52d5b0e70fSEmmanuel Vadot Phandle to the syscon managing the "general register files" (GRF), 53d5b0e70fSEmmanuel Vadot if missing pll rates are not changeable, due to the missing pll 54d5b0e70fSEmmanuel Vadot lock status. 55d5b0e70fSEmmanuel Vadot 56d5b0e70fSEmmanuel Vadotrequired: 57d5b0e70fSEmmanuel Vadot - compatible 58d5b0e70fSEmmanuel Vadot - reg 59d5b0e70fSEmmanuel Vadot - "#clock-cells" 60d5b0e70fSEmmanuel Vadot - "#reset-cells" 61d5b0e70fSEmmanuel Vadot 62d5b0e70fSEmmanuel VadotadditionalProperties: false 63d5b0e70fSEmmanuel Vadot 64d5b0e70fSEmmanuel Vadotexamples: 65d5b0e70fSEmmanuel Vadot - | 66d5b0e70fSEmmanuel Vadot cru: clock-controller@20000000 { 67d5b0e70fSEmmanuel Vadot compatible = "rockchip,rk3036-cru"; 68d5b0e70fSEmmanuel Vadot reg = <0x20000000 0x1000>; 69d5b0e70fSEmmanuel Vadot rockchip,grf = <&grf>; 70d5b0e70fSEmmanuel Vadot #clock-cells = <1>; 71d5b0e70fSEmmanuel Vadot #reset-cells = <1>; 72d5b0e70fSEmmanuel Vadot }; 73