1*aa1a8ff2SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*aa1a8ff2SEmmanuel Vadot%YAML 1.2 3*aa1a8ff2SEmmanuel Vadot--- 4*aa1a8ff2SEmmanuel Vadot$id: http://devicetree.org/schemas/clock/renesas,5p35023.yaml# 5*aa1a8ff2SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*aa1a8ff2SEmmanuel Vadot 7*aa1a8ff2SEmmanuel Vadottitle: Renesas 5p35023 VersaClock 3 programmable I2C clock generator 8*aa1a8ff2SEmmanuel Vadot 9*aa1a8ff2SEmmanuel Vadotmaintainers: 10*aa1a8ff2SEmmanuel Vadot - Biju Das <biju.das.jz@bp.renesas.com> 11*aa1a8ff2SEmmanuel Vadot 12*aa1a8ff2SEmmanuel Vadotdescription: | 13*aa1a8ff2SEmmanuel Vadot The 5P35023 is a VersaClock programmable clock generator and 14*aa1a8ff2SEmmanuel Vadot is designed for low-power, consumer, and high-performance PCI 15*aa1a8ff2SEmmanuel Vadot express applications. The 5P35023 device is a three PLL 16*aa1a8ff2SEmmanuel Vadot architecture design, and each PLL is individually programmable 17*aa1a8ff2SEmmanuel Vadot and allowing for up to 6 unique frequency outputs. 18*aa1a8ff2SEmmanuel Vadot 19*aa1a8ff2SEmmanuel Vadot An internal OTP memory allows the user to store the configuration 20*aa1a8ff2SEmmanuel Vadot in the device. After power up, the user can change the device register 21*aa1a8ff2SEmmanuel Vadot settings through the I2C interface when I2C mode is selected. 22*aa1a8ff2SEmmanuel Vadot 23*aa1a8ff2SEmmanuel Vadot The driver can read a full register map from the DT, and will use that 24*aa1a8ff2SEmmanuel Vadot register map to initialize the attached part (via I2C) when the system 25*aa1a8ff2SEmmanuel Vadot boots. Any configuration not supported by the common clock framework 26*aa1a8ff2SEmmanuel Vadot must be done via the full register map, including optimized settings. 27*aa1a8ff2SEmmanuel Vadot 28*aa1a8ff2SEmmanuel Vadot Link to datasheet: 29*aa1a8ff2SEmmanuel Vadot https://www.renesas.com/us/en/products/clocks-timing/clock-generation/programmable-clocks/5p35023-versaclock-3s-programmable-clock-generator 30*aa1a8ff2SEmmanuel Vadot 31*aa1a8ff2SEmmanuel Vadotproperties: 32*aa1a8ff2SEmmanuel Vadot compatible: 33*aa1a8ff2SEmmanuel Vadot enum: 34*aa1a8ff2SEmmanuel Vadot - renesas,5p35023 35*aa1a8ff2SEmmanuel Vadot 36*aa1a8ff2SEmmanuel Vadot reg: 37*aa1a8ff2SEmmanuel Vadot maxItems: 1 38*aa1a8ff2SEmmanuel Vadot 39*aa1a8ff2SEmmanuel Vadot '#clock-cells': 40*aa1a8ff2SEmmanuel Vadot description: 41*aa1a8ff2SEmmanuel Vadot The index in the assigned-clocks is mapped to the output clock as below 42*aa1a8ff2SEmmanuel Vadot 0 - REF, 1 - SE1, 2 - SE2, 3 - SE3, 4 - DIFF1, 5 - DIFF2. 43*aa1a8ff2SEmmanuel Vadot const: 1 44*aa1a8ff2SEmmanuel Vadot 45*aa1a8ff2SEmmanuel Vadot clocks: 46*aa1a8ff2SEmmanuel Vadot maxItems: 1 47*aa1a8ff2SEmmanuel Vadot 48*aa1a8ff2SEmmanuel Vadot renesas,settings: 49*aa1a8ff2SEmmanuel Vadot description: Optional, complete register map of the device. 50*aa1a8ff2SEmmanuel Vadot Optimized settings for the device must be provided in full 51*aa1a8ff2SEmmanuel Vadot and are written during initialization. 52*aa1a8ff2SEmmanuel Vadot $ref: /schemas/types.yaml#/definitions/uint8-array 53*aa1a8ff2SEmmanuel Vadot maxItems: 37 54*aa1a8ff2SEmmanuel Vadot 55*aa1a8ff2SEmmanuel Vadotrequired: 56*aa1a8ff2SEmmanuel Vadot - compatible 57*aa1a8ff2SEmmanuel Vadot - reg 58*aa1a8ff2SEmmanuel Vadot - '#clock-cells' 59*aa1a8ff2SEmmanuel Vadot - clocks 60*aa1a8ff2SEmmanuel Vadot 61*aa1a8ff2SEmmanuel VadotadditionalProperties: false 62*aa1a8ff2SEmmanuel Vadot 63*aa1a8ff2SEmmanuel Vadotexamples: 64*aa1a8ff2SEmmanuel Vadot - | 65*aa1a8ff2SEmmanuel Vadot i2c { 66*aa1a8ff2SEmmanuel Vadot #address-cells = <1>; 67*aa1a8ff2SEmmanuel Vadot #size-cells = <0>; 68*aa1a8ff2SEmmanuel Vadot 69*aa1a8ff2SEmmanuel Vadot versa3: clock-generator@68 { 70*aa1a8ff2SEmmanuel Vadot compatible = "renesas,5p35023"; 71*aa1a8ff2SEmmanuel Vadot reg = <0x68>; 72*aa1a8ff2SEmmanuel Vadot #clock-cells = <1>; 73*aa1a8ff2SEmmanuel Vadot 74*aa1a8ff2SEmmanuel Vadot clocks = <&x1>; 75*aa1a8ff2SEmmanuel Vadot 76*aa1a8ff2SEmmanuel Vadot renesas,settings = [ 77*aa1a8ff2SEmmanuel Vadot 80 00 11 19 4c 02 23 7f 83 19 08 a9 5f 25 24 bf 78*aa1a8ff2SEmmanuel Vadot 00 14 7a e1 00 00 00 00 01 55 59 bb 3f 30 90 b6 79*aa1a8ff2SEmmanuel Vadot 80 b0 45 c4 95 80*aa1a8ff2SEmmanuel Vadot ]; 81*aa1a8ff2SEmmanuel Vadot 82*aa1a8ff2SEmmanuel Vadot assigned-clocks = <&versa3 0>, <&versa3 1>, 83*aa1a8ff2SEmmanuel Vadot <&versa3 2>, <&versa3 3>, 84*aa1a8ff2SEmmanuel Vadot <&versa3 4>, <&versa3 5>; 85*aa1a8ff2SEmmanuel Vadot assigned-clock-rates = <24000000>, <11289600>, 86*aa1a8ff2SEmmanuel Vadot <11289600>, <12000000>, 87*aa1a8ff2SEmmanuel Vadot <25000000>, <12288000>; 88*aa1a8ff2SEmmanuel Vadot }; 89*aa1a8ff2SEmmanuel Vadot }; 90