xref: /freebsd/sys/contrib/device-tree/Bindings/clock/qcom,sm8450-gpucc.yaml (revision 5ca8e32633c4ffbbcd6762e5888b6a4ba0708c6c) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,sm8450-gpucc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Graphics Clock & Reset Controller on SM8450
8
9maintainers:
10  - Konrad Dybcio <konrad.dybcio@linaro.org>
11
12description: |
13  Qualcomm graphics clock control module provides the clocks, resets and power
14  domains on Qualcomm SoCs.
15
16  See also::
17    include/dt-bindings/clock/qcom,sm8450-gpucc.h
18    include/dt-bindings/clock/qcom,sm8550-gpucc.h
19    include/dt-bindings/reset/qcom,sm8450-gpucc.h
20
21properties:
22  compatible:
23    enum:
24      - qcom,sm8450-gpucc
25      - qcom,sm8550-gpucc
26
27  clocks:
28    items:
29      - description: Board XO source
30      - description: GPLL0 main branch source
31      - description: GPLL0 div branch source
32
33  '#clock-cells':
34    const: 1
35
36  '#reset-cells':
37    const: 1
38
39  '#power-domain-cells':
40    const: 1
41
42  reg:
43    maxItems: 1
44
45required:
46  - compatible
47  - reg
48  - clocks
49  - '#clock-cells'
50  - '#reset-cells'
51  - '#power-domain-cells'
52
53additionalProperties: false
54
55examples:
56  - |
57    #include <dt-bindings/clock/qcom,gcc-sm8450.h>
58    #include <dt-bindings/clock/qcom,rpmh.h>
59
60    soc {
61        #address-cells = <2>;
62        #size-cells = <2>;
63
64        clock-controller@3d90000 {
65            compatible = "qcom,sm8450-gpucc";
66            reg = <0 0x03d90000 0 0xa000>;
67            clocks = <&rpmhcc RPMH_CXO_CLK>,
68                     <&gcc GCC_GPU_GPLL0_CLK_SRC>,
69                     <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
70            #clock-cells = <1>;
71            #reset-cells = <1>;
72            #power-domain-cells = <1>;
73        };
74    };
75...
76