xref: /freebsd/sys/contrib/device-tree/Bindings/clock/qcom,sm8450-camcc.yaml (revision e9ac41698b2f322d55ccf9da50a3596edb2c1800) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,sm8450-camcc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Camera Clock & Reset Controller on SM8450
8
9maintainers:
10  - Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
11
12description: |
13  Qualcomm camera clock control module provides the clocks, resets and power
14  domains on SM8450.
15
16  See also::
17    include/dt-bindings/clock/qcom,sm8450-camcc.h
18    include/dt-bindings/clock/qcom,sm8550-camcc.h
19    include/dt-bindings/clock/qcom,sc8280xp-camcc.h
20
21allOf:
22  - $ref: qcom,gcc.yaml#
23
24properties:
25  compatible:
26    enum:
27      - qcom,sc8280xp-camcc
28      - qcom,sm8450-camcc
29      - qcom,sm8550-camcc
30
31  clocks:
32    items:
33      - description: Camera AHB clock from GCC
34      - description: Board XO source
35      - description: Board active XO source
36      - description: Sleep clock source
37
38  power-domains:
39    maxItems: 1
40    description:
41      A phandle and PM domain specifier for the MMCX power domain.
42
43  required-opps:
44    maxItems: 1
45    description:
46      A phandle to an OPP node describing required MMCX performance point.
47
48  reg:
49    maxItems: 1
50
51required:
52  - compatible
53  - clocks
54  - power-domains
55  - required-opps
56
57unevaluatedProperties: false
58
59examples:
60  - |
61    #include <dt-bindings/clock/qcom,gcc-sm8450.h>
62    #include <dt-bindings/clock/qcom,rpmh.h>
63    #include <dt-bindings/power/qcom,rpmhpd.h>
64    clock-controller@ade0000 {
65      compatible = "qcom,sm8450-camcc";
66      reg = <0xade0000 0x20000>;
67      clocks = <&gcc GCC_CAMERA_AHB_CLK>,
68               <&rpmhcc RPMH_CXO_CLK>,
69               <&rpmhcc RPMH_CXO_CLK_A>,
70               <&sleep_clk>;
71      power-domains = <&rpmhpd RPMHPD_MMCX>;
72      required-opps = <&rpmhpd_opp_low_svs>;
73      #clock-cells = <1>;
74      #reset-cells = <1>;
75      #power-domain-cells = <1>;
76    };
77...
78