xref: /freebsd/sys/contrib/device-tree/Bindings/clock/qcom,qcs615-videocc.yaml (revision 833e5d42ab135b0238e61c5b3c19b8619677cbfa)
1*833e5d42SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*833e5d42SEmmanuel Vadot%YAML 1.2
3*833e5d42SEmmanuel Vadot---
4*833e5d42SEmmanuel Vadot$id: http://devicetree.org/schemas/clock/qcom,qcs615-videocc.yaml#
5*833e5d42SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml#
6*833e5d42SEmmanuel Vadot
7*833e5d42SEmmanuel Vadottitle: Qualcomm Video Clock & Reset Controller on QCS615
8*833e5d42SEmmanuel Vadot
9*833e5d42SEmmanuel Vadotmaintainers:
10*833e5d42SEmmanuel Vadot  - Taniya Das <quic_tdas@quicinc.com>
11*833e5d42SEmmanuel Vadot
12*833e5d42SEmmanuel Vadotdescription: |
13*833e5d42SEmmanuel Vadot  Qualcomm video clock control module provides clocks, resets and power
14*833e5d42SEmmanuel Vadot  domains on QCS615 Qualcomm SoCs.
15*833e5d42SEmmanuel Vadot
16*833e5d42SEmmanuel Vadot  See also: include/dt-bindings/clock/qcom,qcs615-videocc.h
17*833e5d42SEmmanuel Vadot
18*833e5d42SEmmanuel Vadotproperties:
19*833e5d42SEmmanuel Vadot  compatible:
20*833e5d42SEmmanuel Vadot    const: qcom,qcs615-videocc
21*833e5d42SEmmanuel Vadot
22*833e5d42SEmmanuel Vadot  clocks:
23*833e5d42SEmmanuel Vadot    items:
24*833e5d42SEmmanuel Vadot      - description: Board XO source
25*833e5d42SEmmanuel Vadot      - description: Sleep clock source
26*833e5d42SEmmanuel Vadot
27*833e5d42SEmmanuel VadotallOf:
28*833e5d42SEmmanuel Vadot  - $ref: qcom,gcc.yaml#
29*833e5d42SEmmanuel Vadot
30*833e5d42SEmmanuel VadotunevaluatedProperties: false
31*833e5d42SEmmanuel Vadot
32*833e5d42SEmmanuel Vadotexamples:
33*833e5d42SEmmanuel Vadot  - |
34*833e5d42SEmmanuel Vadot    #include <dt-bindings/clock/qcom,rpmh.h>
35*833e5d42SEmmanuel Vadot    #include <dt-bindings/clock/qcom,qcs615-gcc.h>
36*833e5d42SEmmanuel Vadot
37*833e5d42SEmmanuel Vadot    clock-controller@ab00000 {
38*833e5d42SEmmanuel Vadot      compatible = "qcom,qcs615-videocc";
39*833e5d42SEmmanuel Vadot      reg = <0xab00000 0x10000>;
40*833e5d42SEmmanuel Vadot      clocks = <&rpmhcc RPMH_CXO_CLK>,
41*833e5d42SEmmanuel Vadot               <&sleep_clk>;
42*833e5d42SEmmanuel Vadot
43*833e5d42SEmmanuel Vadot      #clock-cells = <1>;
44*833e5d42SEmmanuel Vadot      #reset-cells = <1>;
45*833e5d42SEmmanuel Vadot      #power-domain-cells = <1>;
46*833e5d42SEmmanuel Vadot    };
47*833e5d42SEmmanuel Vadot...
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