1# SPDX-License-Identifier: GPL-2.0-only 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/clock/qcom,mmcc.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm Multimedia Clock & Reset Controller Binding 8 9maintainers: 10 - Jeffrey Hugo <jhugo@codeaurora.org> 11 - Taniya Das <tdas@codeaurora.org> 12 13description: | 14 Qualcomm multimedia clock control module which supports the clocks, resets and 15 power domains. 16 17properties: 18 compatible: 19 enum: 20 - qcom,mmcc-apq8064 21 - qcom,mmcc-apq8084 22 - qcom,mmcc-msm8660 23 - qcom,mmcc-msm8960 24 - qcom,mmcc-msm8974 25 - qcom,mmcc-msm8996 26 - qcom,mmcc-msm8998 27 28 clocks: 29 items: 30 - description: Board XO source 31 - description: Board sleep source 32 - description: Global PLL 0 clock 33 - description: DSI phy instance 0 dsi clock 34 - description: DSI phy instance 0 byte clock 35 - description: DSI phy instance 1 dsi clock 36 - description: DSI phy instance 1 byte clock 37 - description: HDMI phy PLL clock 38 - description: DisplayPort phy PLL vco clock 39 - description: DisplayPort phy PLL link clock 40 41 clock-names: 42 items: 43 - const: xo 44 - const: sleep 45 - const: gpll0 46 - const: dsi0dsi 47 - const: dsi0byte 48 - const: dsi1dsi 49 - const: dsi1byte 50 - const: hdmipll 51 - const: dpvco 52 - const: dplink 53 54 '#clock-cells': 55 const: 1 56 57 '#reset-cells': 58 const: 1 59 60 '#power-domain-cells': 61 const: 1 62 63 reg: 64 maxItems: 1 65 66 protected-clocks: 67 description: 68 Protected clock specifier list as per common clock binding 69 70 vdd-gfx-supply: 71 description: 72 Regulator supply for the GPU_GX GDSC 73 74required: 75 - compatible 76 - reg 77 - '#clock-cells' 78 - '#reset-cells' 79 - '#power-domain-cells' 80 81additionalProperties: false 82 83if: 84 properties: 85 compatible: 86 contains: 87 const: qcom,mmcc-msm8998 88 89then: 90 required: 91 - clocks 92 - clock-names 93 94examples: 95 # Example for MMCC for MSM8960: 96 - | 97 clock-controller@4000000 { 98 compatible = "qcom,mmcc-msm8960"; 99 reg = <0x4000000 0x1000>; 100 #clock-cells = <1>; 101 #reset-cells = <1>; 102 #power-domain-cells = <1>; 103 }; 104... 105