1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/clock/qcom,gcc-sm8350.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm Global Clock & Reset Controller on SM8350 8 9maintainers: 10 - Vinod Koul <vkoul@kernel.org> 11 12description: | 13 Qualcomm global clock control module provides the clocks, resets and power 14 domains on SM8350. 15 16 See also:: include/dt-bindings/clock/qcom,gcc-sm8350.h 17 18properties: 19 compatible: 20 const: qcom,gcc-sm8350 21 22 clocks: 23 items: 24 - description: Board XO source 25 - description: Sleep clock source 26 - description: PLL test clock source (Optional clock) 27 - description: PCIE 0 Pipe clock source (Optional clock) 28 - description: PCIE 1 Pipe clock source (Optional clock) 29 - description: UFS card Rx symbol 0 clock source (Optional clock) 30 - description: UFS card Rx symbol 1 clock source (Optional clock) 31 - description: UFS card Tx symbol 0 clock source (Optional clock) 32 - description: UFS phy Rx symbol 0 clock source (Optional clock) 33 - description: UFS phy Rx symbol 1 clock source (Optional clock) 34 - description: UFS phy Tx symbol 0 clock source (Optional clock) 35 - description: USB3 phy wrapper pipe clock source (Optional clock) 36 - description: USB3 phy sec pipe clock source (Optional clock) 37 minItems: 2 38 39 clock-names: 40 items: 41 - const: bi_tcxo 42 - const: sleep_clk 43 - const: core_bi_pll_test_se # Optional clock 44 - const: pcie_0_pipe_clk # Optional clock 45 - const: pcie_1_pipe_clk # Optional clock 46 - const: ufs_card_rx_symbol_0_clk # Optional clock 47 - const: ufs_card_rx_symbol_1_clk # Optional clock 48 - const: ufs_card_tx_symbol_0_clk # Optional clock 49 - const: ufs_phy_rx_symbol_0_clk # Optional clock 50 - const: ufs_phy_rx_symbol_1_clk # Optional clock 51 - const: ufs_phy_tx_symbol_0_clk # Optional clock 52 - const: usb3_phy_wrapper_gcc_usb30_pipe_clk # Optional clock 53 - const: usb3_uni_phy_sec_gcc_usb30_pipe_clk # Optional clock 54 minItems: 2 55 56required: 57 - compatible 58 - clocks 59 - clock-names 60 61allOf: 62 - $ref: qcom,gcc.yaml# 63 64unevaluatedProperties: false 65 66examples: 67 - | 68 #include <dt-bindings/clock/qcom,rpmh.h> 69 clock-controller@100000 { 70 compatible = "qcom,gcc-sm8350"; 71 reg = <0x00100000 0x1f0000>; 72 clocks = <&rpmhcc RPMH_CXO_CLK>, 73 <&sleep_clk>; 74 clock-names = "bi_tcxo", "sleep_clk"; 75 #clock-cells = <1>; 76 #reset-cells = <1>; 77 #power-domain-cells = <1>; 78 }; 79 80... 81