1# SPDX-License-Identifier: GPL-2.0-only 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/clock/qcom,gcc-msm8998.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Qualcomm Global Clock & Reset Controller on MSM8998 8 9maintainers: 10 - Stephen Boyd <sboyd@kernel.org> 11 - Taniya Das <tdas@codeaurora.org> 12 13description: | 14 Qualcomm global clock control module provides the clocks, resets and power 15 domains on MSM8998. 16 17 See also:: include/dt-bindings/clock/qcom,gcc-msm8998.h 18 19properties: 20 compatible: 21 const: qcom,gcc-msm8998 22 23 clocks: 24 items: 25 - description: Board XO source 26 - description: Sleep clock source 27 - description: Audio reference clock (Optional clock) 28 - description: PLL test clock source (Optional clock) 29 minItems: 2 30 31 clock-names: 32 items: 33 - const: xo 34 - const: sleep_clk 35 - const: aud_ref_clk # Optional clock 36 - const: core_bi_pll_test_se # Optional clock 37 minItems: 2 38 39required: 40 - compatible 41 - clocks 42 - clock-names 43 44allOf: 45 - $ref: qcom,gcc.yaml# 46 47unevaluatedProperties: false 48 49examples: 50 - | 51 #include <dt-bindings/clock/qcom,rpmcc.h> 52 clock-controller@100000 { 53 compatible = "qcom,gcc-msm8998"; 54 #clock-cells = <1>; 55 #reset-cells = <1>; 56 #power-domain-cells = <1>; 57 reg = <0x00100000 0xb0000>; 58 clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, 59 <&sleep>, 60 <0>, 61 <0>; 62 clock-names = "xo", 63 "sleep_clk", 64 "aud_ref_clk", 65 "core_bi_pll_test_se"; 66 }; 67... 68