xref: /freebsd/sys/contrib/device-tree/Bindings/clock/qcom,dispcc-sc8280xp.yaml (revision fac71e4e09885bb2afa3d984a0c239a52e1a7418) 
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,dispcc-sc8280xp.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Qualcomm Display Clock & Reset Controller on SC8280XP
8
9maintainers:
10  - Bjorn Andersson <bjorn.andersson@linaro.org>
11
12description: |
13  Qualcomm display clock control module which supports the clocks, resets and
14  power domains for the two MDSS instances on SC8280XP.
15
16  See also:
17    include/dt-bindings/clock/qcom,dispcc-sc8280xp.h
18
19properties:
20  compatible:
21    enum:
22      - qcom,sc8280xp-dispcc0
23      - qcom,sc8280xp-dispcc1
24
25  clocks:
26    items:
27      - description: AHB interface clock,
28      - description: SoC CXO clock
29      - description: SoC sleep clock
30      - description: DisplayPort 0 link clock
31      - description: DisplayPort 0 VCO div clock
32      - description: DisplayPort 1 link clock
33      - description: DisplayPort 1 VCO div clock
34      - description: DisplayPort 2 link clock
35      - description: DisplayPort 2 VCO div clock
36      - description: DisplayPort 3 link clock
37      - description: DisplayPort 3 VCO div clock
38      - description: DSI 0 PLL byte clock
39      - description: DSI 0 PLL DSI clock
40      - description: DSI 1 PLL byte clock
41      - description: DSI 1 PLL DSI clock
42
43  '#clock-cells':
44    const: 1
45
46  '#reset-cells':
47    const: 1
48
49  '#power-domain-cells':
50    const: 1
51
52  reg:
53    maxItems: 1
54
55  power-domains:
56    items:
57      - description: MMCX power domain
58
59required:
60  - compatible
61  - reg
62  - clocks
63  - '#clock-cells'
64  - '#reset-cells'
65  - '#power-domain-cells'
66
67additionalProperties: false
68
69examples:
70  - |
71    #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
72    #include <dt-bindings/clock/qcom,rpmh.h>
73    #include <dt-bindings/power/qcom-rpmpd.h>
74    clock-controller@af00000 {
75      compatible = "qcom,sc8280xp-dispcc0";
76      reg = <0x0af00000 0x20000>;
77      clocks = <&gcc GCC_DISP_AHB_CLK>,
78               <&rpmhcc RPMH_CXO_CLK>,
79               <&sleep_clk>,
80               <&mdss0_dp_phy0 0>,
81               <&mdss0_dp_phy0 1>,
82               <&mdss0_dp_phy1 0>,
83               <&mdss0_dp_phy1 1>,
84               <&mdss0_dp_phy2 0>,
85               <&mdss0_dp_phy2 1>,
86               <&mdss0_dp_phy3 0>,
87               <&mdss0_dp_phy3 1>,
88               <&mdss0_dsi0_phy 0>,
89               <&mdss0_dsi0_phy 1>,
90               <&mdss0_dsi1_phy 0>,
91               <&mdss0_dsi1_phy 1>;
92      power-domains = <&rpmhpd SC8280XP_MMCX>;
93      #clock-cells = <1>;
94      #reset-cells = <1>;
95      #power-domain-cells = <1>;
96    };
97...
98