xref: /freebsd/sys/contrib/device-tree/Bindings/clock/qcom,aoncc-sm8250.yaml (revision ec0ea6efa1ad229d75c394c1a9b9cac33af2b1d3)
1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/clock/qcom,aoncc-sm8250.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Clock bindings for LPASS Always ON Clock Controller on SM8250 SoCs
8
9maintainers:
10  - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
11
12description: |
13  The clock consumer should specify the desired clock by having the clock
14  ID in its "clocks" phandle cell.
15  See include/dt-bindings/clock/qcom,sm8250-lpass-aoncc.h for the full list
16  of Audio Clock controller clock IDs.
17
18properties:
19  compatible:
20    const: qcom,sm8250-lpass-aon
21
22  reg:
23    maxItems: 1
24
25  '#clock-cells':
26    const: 1
27
28  clocks:
29    items:
30      - description: LPASS Core voting clock
31      - description: Glitch Free Mux register clock
32
33  clock-names:
34    items:
35      - const: core
36      - const: bus
37
38required:
39  - compatible
40  - reg
41  - '#clock-cells'
42  - clocks
43  - clock-names
44
45additionalProperties: false
46
47examples:
48  - |
49    #include <dt-bindings/clock/qcom,sm8250-lpass-aoncc.h>
50    #include <dt-bindings/sound/qcom,q6afe.h>
51    clock-controller@3800000 {
52      #clock-cells = <1>;
53      compatible = "qcom,sm8250-lpass-aon";
54      reg = <0x03380000 0x40000>;
55      clocks = <&q6afecc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>,
56               <&q6afecc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>;
57      clock-names = "core", "bus";
58    };
59