xref: /freebsd/sys/contrib/device-tree/Bindings/clock/qcom,milos-gcc.yaml (revision 833e5d42ab135b0238e61c5b3c19b8619677cbfa)
1*833e5d42SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*833e5d42SEmmanuel Vadot%YAML 1.2
3*833e5d42SEmmanuel Vadot---
4*833e5d42SEmmanuel Vadot$id: http://devicetree.org/schemas/clock/qcom,milos-gcc.yaml#
5*833e5d42SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml#
6*833e5d42SEmmanuel Vadot
7*833e5d42SEmmanuel Vadottitle: Qualcomm Global Clock & Reset Controller on Milos
8*833e5d42SEmmanuel Vadot
9*833e5d42SEmmanuel Vadotmaintainers:
10*833e5d42SEmmanuel Vadot  - Luca Weiss <luca.weiss@fairphone.com>
11*833e5d42SEmmanuel Vadot
12*833e5d42SEmmanuel Vadotdescription: |
13*833e5d42SEmmanuel Vadot  Qualcomm global clock control module provides the clocks, resets and power
14*833e5d42SEmmanuel Vadot  domains on Milos.
15*833e5d42SEmmanuel Vadot
16*833e5d42SEmmanuel Vadot  See also: include/dt-bindings/clock/qcom,milos-gcc.h
17*833e5d42SEmmanuel Vadot
18*833e5d42SEmmanuel Vadotproperties:
19*833e5d42SEmmanuel Vadot  compatible:
20*833e5d42SEmmanuel Vadot    const: qcom,milos-gcc
21*833e5d42SEmmanuel Vadot
22*833e5d42SEmmanuel Vadot  clocks:
23*833e5d42SEmmanuel Vadot    items:
24*833e5d42SEmmanuel Vadot      - description: Board XO source
25*833e5d42SEmmanuel Vadot      - description: Sleep clock source
26*833e5d42SEmmanuel Vadot      - description: PCIE 0 Pipe clock source
27*833e5d42SEmmanuel Vadot      - description: PCIE 1 Pipe clock source
28*833e5d42SEmmanuel Vadot      - description: UFS Phy Rx symbol 0 clock source
29*833e5d42SEmmanuel Vadot      - description: UFS Phy Rx symbol 1 clock source
30*833e5d42SEmmanuel Vadot      - description: UFS Phy Tx symbol 0 clock source
31*833e5d42SEmmanuel Vadot      - description: USB3 Phy wrapper pipe clock source
32*833e5d42SEmmanuel Vadot
33*833e5d42SEmmanuel Vadotrequired:
34*833e5d42SEmmanuel Vadot  - compatible
35*833e5d42SEmmanuel Vadot  - clocks
36*833e5d42SEmmanuel Vadot  - '#power-domain-cells'
37*833e5d42SEmmanuel Vadot
38*833e5d42SEmmanuel VadotallOf:
39*833e5d42SEmmanuel Vadot  - $ref: qcom,gcc.yaml#
40*833e5d42SEmmanuel Vadot
41*833e5d42SEmmanuel VadotunevaluatedProperties: false
42*833e5d42SEmmanuel Vadot
43*833e5d42SEmmanuel Vadotexamples:
44*833e5d42SEmmanuel Vadot  - |
45*833e5d42SEmmanuel Vadot    #include <dt-bindings/clock/qcom,rpmh.h>
46*833e5d42SEmmanuel Vadot    clock-controller@100000 {
47*833e5d42SEmmanuel Vadot        compatible = "qcom,milos-gcc";
48*833e5d42SEmmanuel Vadot        reg = <0x00100000 0x1f4200>;
49*833e5d42SEmmanuel Vadot        clocks = <&rpmhcc RPMH_CXO_CLK>,
50*833e5d42SEmmanuel Vadot                 <&sleep_clk>,
51*833e5d42SEmmanuel Vadot                 <&pcie0_phy>,
52*833e5d42SEmmanuel Vadot                 <&pcie1_phy>,
53*833e5d42SEmmanuel Vadot                 <&ufs_mem_phy 0>,
54*833e5d42SEmmanuel Vadot                 <&ufs_mem_phy 1>,
55*833e5d42SEmmanuel Vadot                 <&ufs_mem_phy 2>,
56*833e5d42SEmmanuel Vadot                 <&usb_1_qmpphy>;
57*833e5d42SEmmanuel Vadot        #clock-cells = <1>;
58*833e5d42SEmmanuel Vadot        #reset-cells = <1>;
59*833e5d42SEmmanuel Vadot        #power-domain-cells = <1>;
60*833e5d42SEmmanuel Vadot    };
61*833e5d42SEmmanuel Vadot
62*833e5d42SEmmanuel Vadot...
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