1*c66ec88fSEmmanuel VadotQualcomm LPASS Clock Controller Binding 2*c66ec88fSEmmanuel Vadot----------------------------------------------- 3*c66ec88fSEmmanuel Vadot 4*c66ec88fSEmmanuel VadotRequired properties : 5*c66ec88fSEmmanuel Vadot- compatible : shall contain "qcom,sdm845-lpasscc" 6*c66ec88fSEmmanuel Vadot- #clock-cells : from common clock binding, shall contain 1. 7*c66ec88fSEmmanuel Vadot- reg : shall contain base register address and size, 8*c66ec88fSEmmanuel Vadot in the order 9*c66ec88fSEmmanuel Vadot Index-0 maps to LPASS_CC register region 10*c66ec88fSEmmanuel Vadot Index-1 maps to LPASS_QDSP6SS register region 11*c66ec88fSEmmanuel Vadot 12*c66ec88fSEmmanuel VadotOptional properties : 13*c66ec88fSEmmanuel Vadot- reg-names : register names of LPASS domain 14*c66ec88fSEmmanuel Vadot "cc", "qdsp6ss". 15*c66ec88fSEmmanuel Vadot 16*c66ec88fSEmmanuel VadotExample: 17*c66ec88fSEmmanuel Vadot 18*c66ec88fSEmmanuel VadotThe below node has to be defined in the cases where the LPASS peripheral loader 19*c66ec88fSEmmanuel Vadotwould bring the subsystem out of reset. 20*c66ec88fSEmmanuel Vadot 21*c66ec88fSEmmanuel Vadot lpasscc: clock-controller@17014000 { 22*c66ec88fSEmmanuel Vadot compatible = "qcom,sdm845-lpasscc"; 23*c66ec88fSEmmanuel Vadot reg = <0x17014000 0x1f004>, <0x17300000 0x200>; 24*c66ec88fSEmmanuel Vadot reg-names = "cc", "qdsp6ss"; 25*c66ec88fSEmmanuel Vadot #clock-cells = <1>; 26*c66ec88fSEmmanuel Vadot }; 27