1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/clock/milbeaut-clock.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Milbeaut SoCs Clock Controller Binding 8 9maintainers: 10 - Taichi Sugaya <sugaya.taichi@socionext.com> 11 12description: | 13 Milbeaut SoCs Clock controller is an integrated clock controller, which 14 generates and supplies to all modules. 15 16 This binding uses common clock bindings 17 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt 18 19properties: 20 compatible: 21 oneOf: 22 - items: 23 - enum: 24 - socionext,milbeaut-m10v-ccu 25 clocks: 26 maxItems: 1 27 description: external clock 28 29 '#clock-cells': 30 const: 1 31 32required: 33 - compatible 34 - reg 35 - clocks 36 - '#clock-cells' 37 38additionalProperties: false 39 40examples: 41 # Clock controller node: 42 - | 43 m10v-clk-ctrl@1d021000 { 44 compatible = "socionext,milbeaut-m10v-clk-ccu"; 45 reg = <0x1d021000 0x4000>; 46 #clock-cells = <1>; 47 clocks = <&clki40mhz>; 48 }; 49 50 # Required an external clock for Clock controller node: 51 - | 52 clocks { 53 clki40mhz: clki40mhz { 54 compatible = "fixed-clock"; 55 #clock-cells = <0>; 56 clock-frequency = <40000000>; 57 }; 58 /* other clocks */ 59 }; 60 61 # The clock consumer shall specify the desired clock-output of the clock 62 # controller as below by specifying output-id in its "clk" phandle cell. 63 # 2: uart 64 # 4: 32-bit timer 65 # 7: UHS-I/II 66 - | 67 serial@1e700010 { 68 compatible = "socionext,milbeaut-usio-uart"; 69 reg = <0x1e700010 0x10>; 70 interrupts = <0 141 0x4>, <0 149 0x4>; 71 interrupt-names = "rx", "tx"; 72 clocks = <&clk 2>; 73 }; 74 75... 76