1*c9ccf3a3SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*c9ccf3a3SEmmanuel Vadot%YAML 1.2 3*c9ccf3a3SEmmanuel Vadot--- 4*c9ccf3a3SEmmanuel Vadot$id: http://devicetree.org/schemas/clock/microchip,mpfs.yaml# 5*c9ccf3a3SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*c9ccf3a3SEmmanuel Vadot 7*c9ccf3a3SEmmanuel Vadottitle: Microchip PolarFire Clock Control Module Binding 8*c9ccf3a3SEmmanuel Vadot 9*c9ccf3a3SEmmanuel Vadotmaintainers: 10*c9ccf3a3SEmmanuel Vadot - Daire McNamara <daire.mcnamara@microchip.com> 11*c9ccf3a3SEmmanuel Vadot 12*c9ccf3a3SEmmanuel Vadotdescription: | 13*c9ccf3a3SEmmanuel Vadot Microchip PolarFire clock control (CLKCFG) is an integrated clock controller, 14*c9ccf3a3SEmmanuel Vadot which gates and enables all peripheral clocks. 15*c9ccf3a3SEmmanuel Vadot 16*c9ccf3a3SEmmanuel Vadot This device tree binding describes 33 gate clocks. Clocks are referenced by 17*c9ccf3a3SEmmanuel Vadot user nodes by the CLKCFG node phandle and the clock index in the group, from 18*c9ccf3a3SEmmanuel Vadot 0 to 32. 19*c9ccf3a3SEmmanuel Vadot 20*c9ccf3a3SEmmanuel Vadotproperties: 21*c9ccf3a3SEmmanuel Vadot compatible: 22*c9ccf3a3SEmmanuel Vadot const: microchip,mpfs-clkcfg 23*c9ccf3a3SEmmanuel Vadot 24*c9ccf3a3SEmmanuel Vadot reg: 25*c9ccf3a3SEmmanuel Vadot items: 26*c9ccf3a3SEmmanuel Vadot - description: | 27*c9ccf3a3SEmmanuel Vadot clock config registers: 28*c9ccf3a3SEmmanuel Vadot These registers contain enable, reset & divider tables for the, cpu, 29*c9ccf3a3SEmmanuel Vadot axi, ahb and rtc/mtimer reference clocks as well as enable and reset 30*c9ccf3a3SEmmanuel Vadot for the peripheral clocks. 31*c9ccf3a3SEmmanuel Vadot - description: | 32*c9ccf3a3SEmmanuel Vadot mss pll dri registers: 33*c9ccf3a3SEmmanuel Vadot Block of registers responsible for dynamic reconfiguration of the mss 34*c9ccf3a3SEmmanuel Vadot pll 35*c9ccf3a3SEmmanuel Vadot 36*c9ccf3a3SEmmanuel Vadot clocks: 37*c9ccf3a3SEmmanuel Vadot maxItems: 1 38*c9ccf3a3SEmmanuel Vadot 39*c9ccf3a3SEmmanuel Vadot '#clock-cells': 40*c9ccf3a3SEmmanuel Vadot const: 1 41*c9ccf3a3SEmmanuel Vadot description: | 42*c9ccf3a3SEmmanuel Vadot The clock consumer should specify the desired clock by having the clock 43*c9ccf3a3SEmmanuel Vadot ID in its "clocks" phandle cell. See include/dt-bindings/clock/microchip,mpfs-clock.h 44*c9ccf3a3SEmmanuel Vadot for the full list of PolarFire clock IDs. 45*c9ccf3a3SEmmanuel Vadot 46*c9ccf3a3SEmmanuel Vadotrequired: 47*c9ccf3a3SEmmanuel Vadot - compatible 48*c9ccf3a3SEmmanuel Vadot - reg 49*c9ccf3a3SEmmanuel Vadot - clocks 50*c9ccf3a3SEmmanuel Vadot - '#clock-cells' 51*c9ccf3a3SEmmanuel Vadot 52*c9ccf3a3SEmmanuel VadotadditionalProperties: false 53*c9ccf3a3SEmmanuel Vadot 54*c9ccf3a3SEmmanuel Vadotexamples: 55*c9ccf3a3SEmmanuel Vadot # Clock Config node: 56*c9ccf3a3SEmmanuel Vadot - | 57*c9ccf3a3SEmmanuel Vadot #include <dt-bindings/clock/microchip,mpfs-clock.h> 58*c9ccf3a3SEmmanuel Vadot soc { 59*c9ccf3a3SEmmanuel Vadot #address-cells = <2>; 60*c9ccf3a3SEmmanuel Vadot #size-cells = <2>; 61*c9ccf3a3SEmmanuel Vadot clkcfg: clock-controller@20002000 { 62*c9ccf3a3SEmmanuel Vadot compatible = "microchip,mpfs-clkcfg"; 63*c9ccf3a3SEmmanuel Vadot reg = <0x0 0x20002000 0x0 0x1000>, <0x0 0x3E001000 0x0 0x1000>; 64*c9ccf3a3SEmmanuel Vadot clocks = <&ref>; 65*c9ccf3a3SEmmanuel Vadot #clock-cells = <1>; 66*c9ccf3a3SEmmanuel Vadot }; 67*c9ccf3a3SEmmanuel Vadot }; 68