xref: /freebsd/sys/contrib/device-tree/Bindings/clock/mediatek,mt7988-ethwarp.yaml (revision 8d13bc63c0e1d50bc9e47ac1f26329c999bfecf0)
1*8d13bc63SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2*8d13bc63SEmmanuel Vadot%YAML 1.2
3*8d13bc63SEmmanuel Vadot---
4*8d13bc63SEmmanuel Vadot$id: http://devicetree.org/schemas/clock/mediatek,mt7988-ethwarp.yaml#
5*8d13bc63SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml#
6*8d13bc63SEmmanuel Vadot
7*8d13bc63SEmmanuel Vadottitle: MediaTek MT7988 ethwarp Controller
8*8d13bc63SEmmanuel Vadot
9*8d13bc63SEmmanuel Vadotmaintainers:
10*8d13bc63SEmmanuel Vadot  - Daniel Golle <daniel@makrotopia.org>
11*8d13bc63SEmmanuel Vadot
12*8d13bc63SEmmanuel Vadotdescription:
13*8d13bc63SEmmanuel Vadot  The Mediatek MT7988 ethwarp controller provides clocks and resets for the
14*8d13bc63SEmmanuel Vadot  Ethernet related subsystems found the MT7988 SoC.
15*8d13bc63SEmmanuel Vadot  The clock values can be found in <dt-bindings/clock/mt*-clk.h>.
16*8d13bc63SEmmanuel Vadot
17*8d13bc63SEmmanuel Vadotproperties:
18*8d13bc63SEmmanuel Vadot  compatible:
19*8d13bc63SEmmanuel Vadot    items:
20*8d13bc63SEmmanuel Vadot      - const: mediatek,mt7988-ethwarp
21*8d13bc63SEmmanuel Vadot
22*8d13bc63SEmmanuel Vadot  reg:
23*8d13bc63SEmmanuel Vadot    maxItems: 1
24*8d13bc63SEmmanuel Vadot
25*8d13bc63SEmmanuel Vadot  '#clock-cells':
26*8d13bc63SEmmanuel Vadot    const: 1
27*8d13bc63SEmmanuel Vadot
28*8d13bc63SEmmanuel Vadot  '#reset-cells':
29*8d13bc63SEmmanuel Vadot    const: 1
30*8d13bc63SEmmanuel Vadot
31*8d13bc63SEmmanuel Vadotrequired:
32*8d13bc63SEmmanuel Vadot  - compatible
33*8d13bc63SEmmanuel Vadot  - reg
34*8d13bc63SEmmanuel Vadot  - '#clock-cells'
35*8d13bc63SEmmanuel Vadot  - '#reset-cells'
36*8d13bc63SEmmanuel Vadot
37*8d13bc63SEmmanuel VadotadditionalProperties: false
38*8d13bc63SEmmanuel Vadot
39*8d13bc63SEmmanuel Vadotexamples:
40*8d13bc63SEmmanuel Vadot  - |
41*8d13bc63SEmmanuel Vadot    #include <dt-bindings/reset/ti-syscon.h>
42*8d13bc63SEmmanuel Vadot    soc {
43*8d13bc63SEmmanuel Vadot        #address-cells = <2>;
44*8d13bc63SEmmanuel Vadot        #size-cells = <2>;
45*8d13bc63SEmmanuel Vadot
46*8d13bc63SEmmanuel Vadot        clock-controller@15031000 {
47*8d13bc63SEmmanuel Vadot            compatible = "mediatek,mt7988-ethwarp";
48*8d13bc63SEmmanuel Vadot            reg = <0 0x15031000 0 0x1000>;
49*8d13bc63SEmmanuel Vadot            #clock-cells = <1>;
50*8d13bc63SEmmanuel Vadot            #reset-cells = <1>;
51*8d13bc63SEmmanuel Vadot        };
52*8d13bc63SEmmanuel Vadot    };
53