1*01950c46SEmmanuel Vadot# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*01950c46SEmmanuel Vadot%YAML 1.2 3*01950c46SEmmanuel Vadot--- 4*01950c46SEmmanuel Vadot$id: http://devicetree.org/schemas/clock/mediatek,mt7622-ssusbsys.yaml# 5*01950c46SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*01950c46SEmmanuel Vadot 7*01950c46SEmmanuel Vadottitle: MediaTek SSUSBSYS clock and reset controller 8*01950c46SEmmanuel Vadot 9*01950c46SEmmanuel Vadotdescription: 10*01950c46SEmmanuel Vadot The MediaTek SSUSBSYS controller provides various clocks to the system. 11*01950c46SEmmanuel Vadot 12*01950c46SEmmanuel Vadotmaintainers: 13*01950c46SEmmanuel Vadot - Matthias Brugger <matthias.bgg@gmail.com> 14*01950c46SEmmanuel Vadot 15*01950c46SEmmanuel Vadotproperties: 16*01950c46SEmmanuel Vadot compatible: 17*01950c46SEmmanuel Vadot enum: 18*01950c46SEmmanuel Vadot - mediatek,mt7622-ssusbsys 19*01950c46SEmmanuel Vadot - mediatek,mt7629-ssusbsys 20*01950c46SEmmanuel Vadot 21*01950c46SEmmanuel Vadot reg: 22*01950c46SEmmanuel Vadot maxItems: 1 23*01950c46SEmmanuel Vadot 24*01950c46SEmmanuel Vadot "#clock-cells": 25*01950c46SEmmanuel Vadot const: 1 26*01950c46SEmmanuel Vadot description: The available clocks are defined in dt-bindings/clock/mt*-clk.h 27*01950c46SEmmanuel Vadot 28*01950c46SEmmanuel Vadot "#reset-cells": 29*01950c46SEmmanuel Vadot const: 1 30*01950c46SEmmanuel Vadot 31*01950c46SEmmanuel Vadotrequired: 32*01950c46SEmmanuel Vadot - reg 33*01950c46SEmmanuel Vadot - "#clock-cells" 34*01950c46SEmmanuel Vadot - "#reset-cells" 35*01950c46SEmmanuel Vadot 36*01950c46SEmmanuel VadotadditionalProperties: false 37*01950c46SEmmanuel Vadot 38*01950c46SEmmanuel Vadotexamples: 39*01950c46SEmmanuel Vadot - | 40*01950c46SEmmanuel Vadot clock-controller@1a000000 { 41*01950c46SEmmanuel Vadot compatible = "mediatek,mt7622-ssusbsys"; 42*01950c46SEmmanuel Vadot reg = <0x1a000000 0x1000>; 43*01950c46SEmmanuel Vadot #clock-cells = <1>; 44*01950c46SEmmanuel Vadot #reset-cells = <1>; 45*01950c46SEmmanuel Vadot }; 46