1*c66ec88fSEmmanuel Vadot# SPDX-License-Identifier: GPL-2.0 2*c66ec88fSEmmanuel Vadot%YAML 1.2 3*c66ec88fSEmmanuel Vadot--- 4*c66ec88fSEmmanuel Vadot$id: http://devicetree.org/schemas/clock/marvell,mmp2-clock.yaml# 5*c66ec88fSEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*c66ec88fSEmmanuel Vadot 7*c66ec88fSEmmanuel Vadottitle: Marvell MMP2 and MMP3 Clock Controller 8*c66ec88fSEmmanuel Vadot 9*c66ec88fSEmmanuel Vadotmaintainers: 10*c66ec88fSEmmanuel Vadot - Lubomir Rintel <lkundrak@v3.sk> 11*c66ec88fSEmmanuel Vadot 12*c66ec88fSEmmanuel Vadotdescription: | 13*c66ec88fSEmmanuel Vadot The clock subsystem on MMP2 or MMP3 generates and supplies clock to various 14*c66ec88fSEmmanuel Vadot controllers within the SoC. 15*c66ec88fSEmmanuel Vadot 16*c66ec88fSEmmanuel Vadot Each clock is assigned an identifier and client nodes use this identifier 17*c66ec88fSEmmanuel Vadot to specify the clock which they consume. 18*c66ec88fSEmmanuel Vadot 19*c66ec88fSEmmanuel Vadot All these identifiers could be found in <dt-bindings/clock/marvell,mmp2.h>. 20*c66ec88fSEmmanuel Vadot 21*c66ec88fSEmmanuel Vadotproperties: 22*c66ec88fSEmmanuel Vadot compatible: 23*c66ec88fSEmmanuel Vadot enum: 24*c66ec88fSEmmanuel Vadot - marvell,mmp2-clock # controller compatible with MMP2 SoC 25*c66ec88fSEmmanuel Vadot - marvell,mmp3-clock # controller compatible with MMP3 SoC 26*c66ec88fSEmmanuel Vadot 27*c66ec88fSEmmanuel Vadot reg: 28*c66ec88fSEmmanuel Vadot items: 29*c66ec88fSEmmanuel Vadot - description: MPMU register region 30*c66ec88fSEmmanuel Vadot - description: APMU register region 31*c66ec88fSEmmanuel Vadot - description: APBC register region 32*c66ec88fSEmmanuel Vadot 33*c66ec88fSEmmanuel Vadot reg-names: 34*c66ec88fSEmmanuel Vadot items: 35*c66ec88fSEmmanuel Vadot - const: mpmu 36*c66ec88fSEmmanuel Vadot - const: apmu 37*c66ec88fSEmmanuel Vadot - const: apbc 38*c66ec88fSEmmanuel Vadot 39*c66ec88fSEmmanuel Vadot '#clock-cells': 40*c66ec88fSEmmanuel Vadot const: 1 41*c66ec88fSEmmanuel Vadot 42*c66ec88fSEmmanuel Vadot '#reset-cells': 43*c66ec88fSEmmanuel Vadot const: 1 44*c66ec88fSEmmanuel Vadot 45*c66ec88fSEmmanuel Vadot '#power-domain-cells': 46*c66ec88fSEmmanuel Vadot const: 1 47*c66ec88fSEmmanuel Vadot 48*c66ec88fSEmmanuel Vadotrequired: 49*c66ec88fSEmmanuel Vadot - compatible 50*c66ec88fSEmmanuel Vadot - reg 51*c66ec88fSEmmanuel Vadot - reg-names 52*c66ec88fSEmmanuel Vadot - '#clock-cells' 53*c66ec88fSEmmanuel Vadot - '#reset-cells' 54*c66ec88fSEmmanuel Vadot - '#power-domain-cells' 55*c66ec88fSEmmanuel Vadot 56*c66ec88fSEmmanuel VadotadditionalProperties: false 57*c66ec88fSEmmanuel Vadot 58*c66ec88fSEmmanuel Vadotexamples: 59*c66ec88fSEmmanuel Vadot - | 60*c66ec88fSEmmanuel Vadot clock-controller@d4050000 { 61*c66ec88fSEmmanuel Vadot compatible = "marvell,mmp2-clock"; 62*c66ec88fSEmmanuel Vadot reg = <0xd4050000 0x1000>, 63*c66ec88fSEmmanuel Vadot <0xd4282800 0x400>, 64*c66ec88fSEmmanuel Vadot <0xd4015000 0x1000>; 65*c66ec88fSEmmanuel Vadot reg-names = "mpmu", "apmu", "apbc"; 66*c66ec88fSEmmanuel Vadot #clock-cells = <1>; 67*c66ec88fSEmmanuel Vadot #reset-cells = <1>; 68*c66ec88fSEmmanuel Vadot #power-domain-cells = <1>; 69*c66ec88fSEmmanuel Vadot }; 70