1*833e5d42SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*833e5d42SEmmanuel Vadot%YAML 1.2 3*833e5d42SEmmanuel Vadot--- 4*833e5d42SEmmanuel Vadot$id: http://devicetree.org/schemas/clock/marvell,armada-3700-periph-clock.yaml# 5*833e5d42SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 6*833e5d42SEmmanuel Vadot 7*833e5d42SEmmanuel Vadottitle: Marvell Armada 37xx SoCs Peripheral Clocks 8*833e5d42SEmmanuel Vadot 9*833e5d42SEmmanuel Vadotmaintainers: 10*833e5d42SEmmanuel Vadot - Andrew Lunn <andrew@lunn.ch> 11*833e5d42SEmmanuel Vadot - Gregory Clement <gregory.clement@bootlin.com> 12*833e5d42SEmmanuel Vadot 13*833e5d42SEmmanuel Vadotdescription: > 14*833e5d42SEmmanuel Vadot Marvell Armada 37xx SoCs provide peripheral clocks which are used as clock 15*833e5d42SEmmanuel Vadot source for the peripheral of the SoC. 16*833e5d42SEmmanuel Vadot 17*833e5d42SEmmanuel Vadot There are two different blocks associated to north bridge and south bridge. 18*833e5d42SEmmanuel Vadot 19*833e5d42SEmmanuel Vadot The following is a list of provided IDs for Armada 3700 North bridge clocks: 20*833e5d42SEmmanuel Vadot 21*833e5d42SEmmanuel Vadot ID Clock name Description 22*833e5d42SEmmanuel Vadot ----------------------------------- 23*833e5d42SEmmanuel Vadot 0 mmc MMC controller 24*833e5d42SEmmanuel Vadot 1 sata_host Sata Host 25*833e5d42SEmmanuel Vadot 2 sec_at Security AT 26*833e5d42SEmmanuel Vadot 3 sac_dap Security DAP 27*833e5d42SEmmanuel Vadot 4 tsecm Security Engine 28*833e5d42SEmmanuel Vadot 5 setm_tmx Serial Embedded Trace Module 29*833e5d42SEmmanuel Vadot 6 avs Adaptive Voltage Scaling 30*833e5d42SEmmanuel Vadot 7 sqf SPI 31*833e5d42SEmmanuel Vadot 8 pwm PWM 32*833e5d42SEmmanuel Vadot 9 i2c_2 I2C 2 33*833e5d42SEmmanuel Vadot 10 i2c_1 I2C 1 34*833e5d42SEmmanuel Vadot 11 ddr_phy DDR PHY 35*833e5d42SEmmanuel Vadot 12 ddr_fclk DDR F clock 36*833e5d42SEmmanuel Vadot 13 trace Trace 37*833e5d42SEmmanuel Vadot 14 counter Counter 38*833e5d42SEmmanuel Vadot 15 eip97 EIP 97 39*833e5d42SEmmanuel Vadot 16 cpu CPU 40*833e5d42SEmmanuel Vadot 41*833e5d42SEmmanuel Vadot The following is a list of provided IDs for Armada 3700 South bridge clocks: 42*833e5d42SEmmanuel Vadot 43*833e5d42SEmmanuel Vadot ID Clock name Description 44*833e5d42SEmmanuel Vadot ----------------------------------- 45*833e5d42SEmmanuel Vadot 0 gbe-50 50 MHz parent clock for Gigabit Ethernet 46*833e5d42SEmmanuel Vadot 1 gbe-core parent clock for Gigabit Ethernet core 47*833e5d42SEmmanuel Vadot 2 gbe-125 125 MHz parent clock for Gigabit Ethernet 48*833e5d42SEmmanuel Vadot 3 gbe1-50 50 MHz clock for Gigabit Ethernet port 1 49*833e5d42SEmmanuel Vadot 4 gbe0-50 50 MHz clock for Gigabit Ethernet port 0 50*833e5d42SEmmanuel Vadot 5 gbe1-125 125 MHz clock for Gigabit Ethernet port 1 51*833e5d42SEmmanuel Vadot 6 gbe0-125 125 MHz clock for Gigabit Ethernet port 0 52*833e5d42SEmmanuel Vadot 7 gbe1-core Gigabit Ethernet core port 1 53*833e5d42SEmmanuel Vadot 8 gbe0-core Gigabit Ethernet core port 0 54*833e5d42SEmmanuel Vadot 9 gbe-bm Gigabit Ethernet Buffer Manager 55*833e5d42SEmmanuel Vadot 10 sdio SDIO 56*833e5d42SEmmanuel Vadot 11 usb32-sub2-sys USB 2 clock 57*833e5d42SEmmanuel Vadot 12 usb32-ss-sys USB 3 clock 58*833e5d42SEmmanuel Vadot 13 pcie PCIe controller 59*833e5d42SEmmanuel Vadot 60*833e5d42SEmmanuel Vadotproperties: 61*833e5d42SEmmanuel Vadot compatible: 62*833e5d42SEmmanuel Vadot oneOf: 63*833e5d42SEmmanuel Vadot - const: marvell,armada-3700-periph-clock-sb 64*833e5d42SEmmanuel Vadot - items: 65*833e5d42SEmmanuel Vadot - const: marvell,armada-3700-periph-clock-nb 66*833e5d42SEmmanuel Vadot - const: syscon 67*833e5d42SEmmanuel Vadot reg: 68*833e5d42SEmmanuel Vadot maxItems: 1 69*833e5d42SEmmanuel Vadot 70*833e5d42SEmmanuel Vadot clocks: 71*833e5d42SEmmanuel Vadot items: 72*833e5d42SEmmanuel Vadot - description: TBG-A P clock and specifier 73*833e5d42SEmmanuel Vadot - description: TBG-B P clock and specifier 74*833e5d42SEmmanuel Vadot - description: TBG-A S clock and specifier 75*833e5d42SEmmanuel Vadot - description: TBG-B S clock and specifier 76*833e5d42SEmmanuel Vadot - description: Xtal clock and specifier 77*833e5d42SEmmanuel Vadot 78*833e5d42SEmmanuel Vadot '#clock-cells': 79*833e5d42SEmmanuel Vadot const: 1 80*833e5d42SEmmanuel Vadot 81*833e5d42SEmmanuel Vadotrequired: 82*833e5d42SEmmanuel Vadot - compatible 83*833e5d42SEmmanuel Vadot - reg 84*833e5d42SEmmanuel Vadot - clocks 85*833e5d42SEmmanuel Vadot - '#clock-cells' 86*833e5d42SEmmanuel Vadot 87*833e5d42SEmmanuel VadotadditionalProperties: false 88*833e5d42SEmmanuel Vadot 89*833e5d42SEmmanuel Vadotexamples: 90*833e5d42SEmmanuel Vadot - | 91*833e5d42SEmmanuel Vadot clock-controller@13000{ 92*833e5d42SEmmanuel Vadot compatible = "marvell,armada-3700-periph-clock-sb"; 93*833e5d42SEmmanuel Vadot reg = <0x13000 0x1000>; 94*833e5d42SEmmanuel Vadot clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, <&tbg 3>, <&xtalclk>; 95*833e5d42SEmmanuel Vadot #clock-cells = <1>; 96*833e5d42SEmmanuel Vadot }; 97