1# SPDX-License-Identifier: GPL-2.0 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/clock/imx8mp-clock.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: NXP i.MX8M Plus Clock Control Module Binding 8 9maintainers: 10 - Anson Huang <Anson.Huang@nxp.com> 11 12description: 13 NXP i.MX8M Plus clock control module is an integrated clock controller, which 14 generates and supplies to all modules. 15 16properties: 17 compatible: 18 const: fsl,imx8mp-ccm 19 20 reg: 21 maxItems: 1 22 23 clocks: 24 items: 25 - description: 32k osc 26 - description: 24m osc 27 - description: ext1 clock input 28 - description: ext2 clock input 29 - description: ext3 clock input 30 - description: ext4 clock input 31 32 clock-names: 33 items: 34 - const: osc_32k 35 - const: osc_24m 36 - const: clk_ext1 37 - const: clk_ext2 38 - const: clk_ext3 39 - const: clk_ext4 40 41 '#clock-cells': 42 const: 1 43 description: 44 The clock consumer should specify the desired clock by having the clock 45 ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mp-clock.h 46 for the full list of i.MX8M Plus clock IDs. 47 48required: 49 - compatible 50 - reg 51 - clocks 52 - clock-names 53 - '#clock-cells' 54 55additionalProperties: false 56 57examples: 58 # Clock Control Module node: 59 - | 60 clk: clock-controller@30380000 { 61 compatible = "fsl,imx8mp-ccm"; 62 reg = <0x30380000 0x10000>; 63 #clock-cells = <1>; 64 clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, 65 <&clk_ext2>, <&clk_ext3>, <&clk_ext4>; 66 clock-names = "osc_32k", "osc_24m", "clk_ext1", 67 "clk_ext2", "clk_ext3", "clk_ext4"; 68 }; 69 70... 71