xref: /freebsd/sys/contrib/device-tree/Bindings/clock/csr,atlas7-car.txt (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71)
1*c66ec88fSEmmanuel Vadot* Clock and reset bindings for CSR atlas7
2*c66ec88fSEmmanuel Vadot
3*c66ec88fSEmmanuel VadotRequired properties:
4*c66ec88fSEmmanuel Vadot- compatible: Should be "sirf,atlas7-car"
5*c66ec88fSEmmanuel Vadot- reg: Address and length of the register set
6*c66ec88fSEmmanuel Vadot- #clock-cells: Should be <1>
7*c66ec88fSEmmanuel Vadot- #reset-cells: Should be <1>
8*c66ec88fSEmmanuel Vadot
9*c66ec88fSEmmanuel VadotThe clock consumer should specify the desired clock by having the clock
10*c66ec88fSEmmanuel VadotID in its "clocks" phandle cell.
11*c66ec88fSEmmanuel VadotThe ID list atlas7_clks defined in drivers/clk/sirf/clk-atlas7.c
12*c66ec88fSEmmanuel Vadot
13*c66ec88fSEmmanuel VadotThe reset consumer should specify the desired reset by having the reset
14*c66ec88fSEmmanuel VadotID in its "reset" phandle cell.
15*c66ec88fSEmmanuel VadotThe ID list atlas7_reset_unit defined in drivers/clk/sirf/clk-atlas7.c
16*c66ec88fSEmmanuel Vadot
17*c66ec88fSEmmanuel VadotExamples: Clock and reset controller node:
18*c66ec88fSEmmanuel Vadot
19*c66ec88fSEmmanuel Vadotcar: clock-controller@18620000 {
20*c66ec88fSEmmanuel Vadot	compatible = "sirf,atlas7-car";
21*c66ec88fSEmmanuel Vadot	reg = <0x18620000 0x1000>;
22*c66ec88fSEmmanuel Vadot	#clock-cells = <1>;
23*c66ec88fSEmmanuel Vadot	#reset-cells = <1>;
24*c66ec88fSEmmanuel Vadot};
25*c66ec88fSEmmanuel Vadot
26*c66ec88fSEmmanuel VadotExamples: Consumers using clock or reset:
27*c66ec88fSEmmanuel Vadot
28*c66ec88fSEmmanuel Vadottimer@10dc0000 {
29*c66ec88fSEmmanuel Vadot	compatible = "sirf,macro-tick";
30*c66ec88fSEmmanuel Vadot	reg = <0x10dc0000 0x1000>;
31*c66ec88fSEmmanuel Vadot	clocks = <&car 54>;
32*c66ec88fSEmmanuel Vadot	interrupts = <0 0 0>,
33*c66ec88fSEmmanuel Vadot		   <0 1 0>,
34*c66ec88fSEmmanuel Vadot		   <0 2 0>,
35*c66ec88fSEmmanuel Vadot		   <0 49 0>,
36*c66ec88fSEmmanuel Vadot		   <0 50 0>,
37*c66ec88fSEmmanuel Vadot		   <0 51 0>;
38*c66ec88fSEmmanuel Vadot};
39*c66ec88fSEmmanuel Vadot
40*c66ec88fSEmmanuel Vadotuart1: uart@18020000 {
41*c66ec88fSEmmanuel Vadot	cell-index = <1>;
42*c66ec88fSEmmanuel Vadot	compatible = "sirf,macro-uart";
43*c66ec88fSEmmanuel Vadot	reg = <0x18020000 0x1000>;
44*c66ec88fSEmmanuel Vadot	clocks = <&clks 95>;
45*c66ec88fSEmmanuel Vadot	interrupts = <0 18 0>;
46*c66ec88fSEmmanuel Vadot	fifosize = <32>;
47*c66ec88fSEmmanuel Vadot};
48*c66ec88fSEmmanuel Vadot
49*c66ec88fSEmmanuel Vadotvpp@13110000 {
50*c66ec88fSEmmanuel Vadot	compatible = "sirf,prima2-vpp";
51*c66ec88fSEmmanuel Vadot	reg = <0x13110000 0x10000>;
52*c66ec88fSEmmanuel Vadot	interrupts = <0 31 0>;
53*c66ec88fSEmmanuel Vadot	clocks = <&car 85>;
54*c66ec88fSEmmanuel Vadot	resets = <&car 29>;
55*c66ec88fSEmmanuel Vadot};
56