1Device Tree Clock bindings for arch-at91 2 3This binding uses the common clock binding[1]. 4 5[1] Documentation/devicetree/bindings/clock/clock-bindings.txt 6 7Slow Clock controller: 8 9Required properties: 10- compatible : shall be one of the following: 11 "atmel,at91sam9x5-sckc", 12 "atmel,sama5d3-sckc", 13 "atmel,sama5d4-sckc" or 14 "microchip,sam9x60-sckc": 15 at91 SCKC (Slow Clock Controller) 16- #clock-cells : shall be 1 for "microchip,sam9x60-sckc" otherwise shall be 0. 17- clocks : shall be the input parent clock phandle for the clock. 18 19Optional properties: 20- atmel,osc-bypass : boolean property. Set this when a clock signal is directly 21 provided on XIN. 22 23For example: 24 sckc@fffffe50 { 25 compatible = "atmel,at91sam9x5-sckc"; 26 reg = <0xfffffe50 0x4>; 27 clocks = <&slow_xtal>; 28 #clock-cells = <0>; 29 }; 30 31Power Management Controller (PMC): 32 33Required properties: 34- compatible : shall be "atmel,<chip>-pmc", "syscon" or 35 "microchip,sam9x60-pmc" 36 <chip> can be: at91rm9200, at91sam9260, at91sam9261, 37 at91sam9263, at91sam9g45, at91sam9n12, at91sam9rl, at91sam9g15, 38 at91sam9g25, at91sam9g35, at91sam9x25, at91sam9x35, at91sam9x5, 39 sama5d2, sama5d3 or sama5d4. 40- #clock-cells : from common clock binding; shall be set to 2. The first entry 41 is the type of the clock (core, system, peripheral or generated) and the 42 second entry its index as provided by the datasheet 43- clocks : Must contain an entry for each entry in clock-names. 44- clock-names: Must include the following entries: "slow_clk", "main_xtal" 45 46Optional properties: 47- atmel,osc-bypass : boolean property. Set this when a clock signal is directly 48 provided on XIN. 49 50For example: 51 pmc: pmc@f0018000 { 52 compatible = "atmel,sama5d4-pmc", "syscon"; 53 reg = <0xf0018000 0x120>; 54 interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; 55 #clock-cells = <2>; 56 clocks = <&clk32k>, <&main_xtal>; 57 clock-names = "slow_clk", "main_xtal"; 58 }; 59