xref: /freebsd/sys/contrib/device-tree/Bindings/cache/qcom,llcc.yaml (revision a03411e84728e9b267056fd31c7d1d9d1dc1b01e) 
1# SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/cache/qcom,llcc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Last Level Cache Controller
8
9maintainers:
10  - Bjorn Andersson <andersson@kernel.org>
11
12description: |
13  LLCC (Last Level Cache Controller) provides last level of cache memory in SoC,
14  that can be shared by multiple clients. Clients here are different cores in the
15  SoC, the idea is to minimize the local caches at the clients and migrate to
16  common pool of memory. Cache memory is divided into partitions called slices
17  which are assigned to clients. Clients can query the slice details, activate
18  and deactivate them.
19
20properties:
21  compatible:
22    enum:
23      - qcom,sc7180-llcc
24      - qcom,sc7280-llcc
25      - qcom,sc8180x-llcc
26      - qcom,sc8280xp-llcc
27      - qcom,sdm845-llcc
28      - qcom,sm6350-llcc
29      - qcom,sm7150-llcc
30      - qcom,sm8150-llcc
31      - qcom,sm8250-llcc
32      - qcom,sm8350-llcc
33      - qcom,sm8450-llcc
34      - qcom,sm8550-llcc
35
36  reg:
37    minItems: 2
38    maxItems: 9
39
40  reg-names:
41    minItems: 2
42    maxItems: 9
43
44  interrupts:
45    maxItems: 1
46
47required:
48  - compatible
49  - reg
50  - reg-names
51
52allOf:
53  - if:
54      properties:
55        compatible:
56          contains:
57            enum:
58              - qcom,sc7180-llcc
59              - qcom,sm6350-llcc
60    then:
61      properties:
62        reg:
63          items:
64            - description: LLCC0 base register region
65            - description: LLCC broadcast base register region
66        reg-names:
67          items:
68            - const: llcc0_base
69            - const: llcc_broadcast_base
70
71  - if:
72      properties:
73        compatible:
74          contains:
75            enum:
76              - qcom,sc7280-llcc
77    then:
78      properties:
79        reg:
80          items:
81            - description: LLCC0 base register region
82            - description: LLCC1 base register region
83            - description: LLCC broadcast base register region
84        reg-names:
85          items:
86            - const: llcc0_base
87            - const: llcc1_base
88            - const: llcc_broadcast_base
89
90  - if:
91      properties:
92        compatible:
93          contains:
94            enum:
95              - qcom,sc8180x-llcc
96              - qcom,sc8280xp-llcc
97    then:
98      properties:
99        reg:
100          items:
101            - description: LLCC0 base register region
102            - description: LLCC1 base register region
103            - description: LLCC2 base register region
104            - description: LLCC3 base register region
105            - description: LLCC4 base register region
106            - description: LLCC5 base register region
107            - description: LLCC6 base register region
108            - description: LLCC7 base register region
109            - description: LLCC broadcast base register region
110        reg-names:
111          items:
112            - const: llcc0_base
113            - const: llcc1_base
114            - const: llcc2_base
115            - const: llcc3_base
116            - const: llcc4_base
117            - const: llcc5_base
118            - const: llcc6_base
119            - const: llcc7_base
120            - const: llcc_broadcast_base
121
122  - if:
123      properties:
124        compatible:
125          contains:
126            enum:
127              - qcom,sdm845-llcc
128              - qcom,sm8150-llcc
129              - qcom,sm8250-llcc
130              - qcom,sm8350-llcc
131              - qcom,sm8450-llcc
132              - qcom,sm8550-llcc
133    then:
134      properties:
135        reg:
136          items:
137            - description: LLCC0 base register region
138            - description: LLCC1 base register region
139            - description: LLCC2 base register region
140            - description: LLCC3 base register region
141            - description: LLCC broadcast base register region
142        reg-names:
143          items:
144            - const: llcc0_base
145            - const: llcc1_base
146            - const: llcc2_base
147            - const: llcc3_base
148            - const: llcc_broadcast_base
149
150additionalProperties: false
151
152examples:
153  - |
154    #include <dt-bindings/interrupt-controller/arm-gic.h>
155
156    soc {
157        #address-cells = <2>;
158        #size-cells = <2>;
159
160        system-cache-controller@1100000 {
161            compatible = "qcom,sdm845-llcc";
162            reg = <0 0x01100000 0 0x50000>, <0 0x01180000 0 0x50000>,
163                <0 0x01200000 0 0x50000>, <0 0x01280000 0 0x50000>,
164                <0 0x01300000 0 0x50000>;
165            reg-names = "llcc0_base", "llcc1_base", "llcc2_base",
166                "llcc3_base", "llcc_broadcast_base";
167            interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
168        };
169    };
170