1c66ec88fSEmmanuel VadotBroadcom GISB bus Arbiter controller 2c66ec88fSEmmanuel Vadot 3c66ec88fSEmmanuel VadotRequired properties: 4c66ec88fSEmmanuel Vadot 5c66ec88fSEmmanuel Vadot- compatible: 6c66ec88fSEmmanuel Vadot "brcm,bcm7278-gisb-arb" for V7 28nm chips 7c66ec88fSEmmanuel Vadot "brcm,gisb-arb" or "brcm,bcm7445-gisb-arb" for other 28nm chips 8c66ec88fSEmmanuel Vadot "brcm,bcm7435-gisb-arb" for newer 40nm chips 9c66ec88fSEmmanuel Vadot "brcm,bcm7400-gisb-arb" for older 40nm chips and all 65nm chips 10c66ec88fSEmmanuel Vadot "brcm,bcm7038-gisb-arb" for 130nm chips 11c66ec88fSEmmanuel Vadot- reg: specifies the base physical address and size of the registers 12c66ec88fSEmmanuel Vadot- interrupts: specifies the two interrupts (timeout and TEA) to be used from 13*6be33864SEmmanuel Vadot the parent interrupt controller. A third optional interrupt may be specified 14*6be33864SEmmanuel Vadot for breakpoints. 15c66ec88fSEmmanuel Vadot 16c66ec88fSEmmanuel VadotOptional properties: 17c66ec88fSEmmanuel Vadot 18c66ec88fSEmmanuel Vadot- brcm,gisb-arb-master-mask: 32-bits wide bitmask used to specify which GISB 19c66ec88fSEmmanuel Vadot masters are valid at the system level 20c66ec88fSEmmanuel Vadot- brcm,gisb-arb-master-names: string list of the litteral name of the GISB 21c66ec88fSEmmanuel Vadot masters. Should match the number of bits set in brcm,gisb-master-mask and 22c66ec88fSEmmanuel Vadot the order in which they appear 23c66ec88fSEmmanuel Vadot 24c66ec88fSEmmanuel VadotExample: 25c66ec88fSEmmanuel Vadot 26c66ec88fSEmmanuel Vadotgisb-arb@f0400000 { 27c66ec88fSEmmanuel Vadot compatible = "brcm,gisb-arb"; 28c66ec88fSEmmanuel Vadot reg = <0xf0400000 0x800>; 29c66ec88fSEmmanuel Vadot interrupts = <0>, <2>; 30c66ec88fSEmmanuel Vadot interrupt-parent = <&sun_l2_intc>; 31c66ec88fSEmmanuel Vadot 32c66ec88fSEmmanuel Vadot brcm,gisb-arb-master-mask = <0x7>; 33c66ec88fSEmmanuel Vadot brcm,gisb-arb-master-names = "bsp_0", "scpu_0", "cpu_0"; 34c66ec88fSEmmanuel Vadot}; 35