1Tegra SoC SATA AHCI controller 2 3Required properties : 4- compatible : Must be one of: 5 - Tegra124 : "nvidia,tegra124-ahci" 6 - Tegra132 : "nvidia,tegra132-ahci", "nvidia,tegra124-ahci" 7 - Tegra210 : "nvidia,tegra210-ahci" 8- reg : Should contain 2 entries: 9 - AHCI register set (SATA BAR5) 10 - SATA register set 11- interrupts : Defines the interrupt used by SATA 12- clocks : Must contain an entry for each entry in clock-names. 13 See ../clocks/clock-bindings.txt for details. 14- clock-names : Must include the following entries: 15 - sata 16 - sata-oob 17- resets : Must contain an entry for each entry in reset-names. 18 See ../reset/reset.txt for details. 19- reset-names : Must include the following entries: 20 - sata 21 - sata-oob 22 - sata-cold 23- phys : Must contain an entry for each entry in phy-names. 24 See ../phy/phy-bindings.txt for details. 25- phy-names : Must include the following entries: 26 - For Tegra124 and Tegra132: 27 - sata-phy : XUSB PADCTL SATA PHY 28- For Tegra124 and Tegra132: 29 - hvdd-supply : Defines the SATA HVDD regulator 30 - vddio-supply : Defines the SATA VDDIO regulator 31 - avdd-supply : Defines the SATA AVDD regulator 32 - target-5v-supply : Defines the SATA 5V power regulator 33 - target-12v-supply : Defines the SATA 12V power regulator 34 35Optional properties: 36- reg : 37 - AUX register set 38- clock-names : 39 - cml1 : 40 cml1 clock should be defined here if the PHY driver 41 doesn't manage them. If it does, they should not be. 42- phy-names : 43 - For T210: 44 - sata-phy 45