1NVIDIA Tegra Activity Monitor 2 3The activity monitor block collects statistics about the behaviour of other 4components in the system. This information can be used to derive the rate at 5which the external memory needs to be clocked in order to serve all requests 6from the monitored clients. 7 8Required properties: 9- compatible: should be "nvidia,tegra<chip>-actmon" 10- reg: offset and length of the register set for the device 11- interrupts: standard interrupt property 12- clocks: Must contain a phandle and clock specifier pair for each entry in 13clock-names. See ../../clock/clock-bindings.txt for details. 14- clock-names: Must include the following entries: 15 - actmon 16 - emc 17- resets: Must contain an entry for each entry in reset-names. See 18../../reset/reset.txt for details. 19- reset-names: Must include the following entries: 20 - actmon 21- operating-points-v2: See ../bindings/opp/opp.txt for details. 22- interconnects: Should contain entries for memory clients sitting on 23 MC->EMC memory interconnect path. 24- interconnect-names: Should include name of the interconnect path for each 25 interconnect entry. Consult TRM documentation for 26 information about available memory clients, see MEMORY 27 CONTROLLER section. 28 29For each opp entry in 'operating-points-v2' table: 30- opp-supported-hw: bitfield indicating SoC speedo ID mask 31- opp-peak-kBps: peak bandwidth of the memory channel 32 33Example: 34 dfs_opp_table: opp-table { 35 compatible = "operating-points-v2"; 36 37 opp@12750000 { 38 opp-hz = /bits/ 64 <12750000>; 39 opp-supported-hw = <0x000F>; 40 opp-peak-kBps = <51000>; 41 }; 42 ... 43 }; 44 45 actmon@6000c800 { 46 compatible = "nvidia,tegra124-actmon"; 47 reg = <0x0 0x6000c800 0x0 0x400>; 48 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; 49 clocks = <&tegra_car TEGRA124_CLK_ACTMON>, 50 <&tegra_car TEGRA124_CLK_EMC>; 51 clock-names = "actmon", "emc"; 52 resets = <&tegra_car 119>; 53 reset-names = "actmon"; 54 operating-points-v2 = <&dfs_opp_table>; 55 interconnects = <&mc TEGRA124_MC_MPCORER &emc>; 56 interconnect-names = "cpu"; 57 }; 58