1c66ec88fSEmmanuel VadotOMAP PRCM bindings 2c66ec88fSEmmanuel Vadot 3c66ec88fSEmmanuel VadotPower Reset and Clock Manager lists the device clocks and clockdomains under 4c66ec88fSEmmanuel Vadota DT hierarchy. Each TI SoC can have multiple PRCM entities listed for it, 5c66ec88fSEmmanuel Vadoteach describing one module and the clock hierarchy under it. see [1] for 6c66ec88fSEmmanuel Vadotdocumentation about the individual clock/clockdomain nodes. 7c66ec88fSEmmanuel Vadot 8c66ec88fSEmmanuel Vadot[1] Documentation/devicetree/bindings/clock/ti/* 9c66ec88fSEmmanuel Vadot 10c66ec88fSEmmanuel VadotRequired properties: 11c66ec88fSEmmanuel Vadot- compatible: Must be one of: 12c66ec88fSEmmanuel Vadot "ti,am3-prcm" 13c66ec88fSEmmanuel Vadot "ti,am4-prcm" 14c66ec88fSEmmanuel Vadot "ti,omap2-prcm" 15c66ec88fSEmmanuel Vadot "ti,omap3-prm" 16c66ec88fSEmmanuel Vadot "ti,omap3-cm" 17c66ec88fSEmmanuel Vadot "ti,omap4-cm1" 18c66ec88fSEmmanuel Vadot "ti,omap4-prm" 19c66ec88fSEmmanuel Vadot "ti,omap4-cm2" 20c66ec88fSEmmanuel Vadot "ti,omap4-scrm" 21c66ec88fSEmmanuel Vadot "ti,omap5-prm" 22c66ec88fSEmmanuel Vadot "ti,omap5-cm-core-aon" 23c66ec88fSEmmanuel Vadot "ti,omap5-scrm" 24c66ec88fSEmmanuel Vadot "ti,omap5-cm-core" 25c66ec88fSEmmanuel Vadot "ti,dra7-prm" 26c66ec88fSEmmanuel Vadot "ti,dra7-cm-core-aon" 27c66ec88fSEmmanuel Vadot "ti,dra7-cm-core" 28c66ec88fSEmmanuel Vadot "ti,dm814-prcm" 29c66ec88fSEmmanuel Vadot "ti,dm816-prcm" 30c66ec88fSEmmanuel Vadot- reg: Contains PRCM module register address range 31c66ec88fSEmmanuel Vadot (base address and length) 32c66ec88fSEmmanuel Vadot- clocks: clocks for this module 33c66ec88fSEmmanuel Vadot- clockdomains: clockdomains for this module 34*d5b0e70fSEmmanuel Vadot- #clock-cells: From common clock binding 35*d5b0e70fSEmmanuel Vadot- clock-output-names: From common clock binding 36*d5b0e70fSEmmanuel Vadot 37c66ec88fSEmmanuel Vadot 38c66ec88fSEmmanuel VadotExample: 39c66ec88fSEmmanuel Vadot 40*d5b0e70fSEmmanuel Vadotcm: clock@48004000 { 41c66ec88fSEmmanuel Vadot compatible = "ti,omap3-cm"; 42c66ec88fSEmmanuel Vadot reg = <0x48004000 0x4000>; 43*d5b0e70fSEmmanuel Vadot #clock-cells = <0>; 44*d5b0e70fSEmmanuel Vadot clock-output-names = "cm"; 45c66ec88fSEmmanuel Vadot 46c66ec88fSEmmanuel Vadot cm_clocks: clocks { 47c66ec88fSEmmanuel Vadot #address-cells = <1>; 48c66ec88fSEmmanuel Vadot #size-cells = <0>; 49c66ec88fSEmmanuel Vadot }; 50c66ec88fSEmmanuel Vadot 51c66ec88fSEmmanuel Vadot cm_clockdomains: clockdomains { 52c66ec88fSEmmanuel Vadot }; 53c66ec88fSEmmanuel Vadot} 54c66ec88fSEmmanuel Vadot 55c66ec88fSEmmanuel Vadot&cm_clocks { 56c66ec88fSEmmanuel Vadot omap2_32k_fck: omap_32k_fck { 57c66ec88fSEmmanuel Vadot #clock-cells = <0>; 58c66ec88fSEmmanuel Vadot compatible = "fixed-clock"; 59c66ec88fSEmmanuel Vadot clock-frequency = <32768>; 60c66ec88fSEmmanuel Vadot }; 61c66ec88fSEmmanuel Vadot}; 62c66ec88fSEmmanuel Vadot 63c66ec88fSEmmanuel Vadot&cm_clockdomains { 64c66ec88fSEmmanuel Vadot core_l3_clkdm: core_l3_clkdm { 65c66ec88fSEmmanuel Vadot compatible = "ti,clockdomain"; 66c66ec88fSEmmanuel Vadot clocks = <&sdrc_ick>; 67c66ec88fSEmmanuel Vadot }; 68c66ec88fSEmmanuel Vadot}; 69