15def4c47SEmmanuel Vadot# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 25def4c47SEmmanuel Vadot# Copyright 2020 thingy.jp. 35def4c47SEmmanuel Vadot%YAML 1.2 45def4c47SEmmanuel Vadot--- 5*aa1a8ff2SEmmanuel Vadot$id: http://devicetree.org/schemas/arm/mstar/mstar,smpctrl.yaml# 6*aa1a8ff2SEmmanuel Vadot$schema: http://devicetree.org/meta-schemas/core.yaml# 75def4c47SEmmanuel Vadot 85def4c47SEmmanuel Vadottitle: MStar/SigmaStar Armv7 SoC SMP control registers 95def4c47SEmmanuel Vadot 105def4c47SEmmanuel Vadotmaintainers: 115def4c47SEmmanuel Vadot - Daniel Palmer <daniel@thingy.jp> 125def4c47SEmmanuel Vadot 135def4c47SEmmanuel Vadotdescription: | 145def4c47SEmmanuel Vadot MStar/SigmaStar's Armv7 SoCs that have more than one processor 155def4c47SEmmanuel Vadot have a region of registers that allow setting the boot address 165def4c47SEmmanuel Vadot and a magic number that allows secondary processors to leave 175def4c47SEmmanuel Vadot the loop they are parked in by the boot ROM. 185def4c47SEmmanuel Vadot 195def4c47SEmmanuel Vadotproperties: 205def4c47SEmmanuel Vadot compatible: 215def4c47SEmmanuel Vadot items: 225def4c47SEmmanuel Vadot - enum: 235def4c47SEmmanuel Vadot - sstar,ssd201-smpctrl # SSD201/SSD202D 245def4c47SEmmanuel Vadot - const: mstar,smpctrl 255def4c47SEmmanuel Vadot 265def4c47SEmmanuel Vadot reg: 275def4c47SEmmanuel Vadot maxItems: 1 285def4c47SEmmanuel Vadot 295def4c47SEmmanuel Vadotrequired: 305def4c47SEmmanuel Vadot - compatible 315def4c47SEmmanuel Vadot - reg 325def4c47SEmmanuel Vadot 335def4c47SEmmanuel VadotadditionalProperties: false 345def4c47SEmmanuel Vadot 355def4c47SEmmanuel Vadotexamples: 365def4c47SEmmanuel Vadot - | 375def4c47SEmmanuel Vadot smpctrl@204000 { 385def4c47SEmmanuel Vadot compatible = "sstar,ssd201-smpctrl", "mstar,smpctrl"; 395def4c47SEmmanuel Vadot reg = <0x204000 0x200>; 405def4c47SEmmanuel Vadot }; 41