xref: /freebsd/sys/contrib/device-tree/Bindings/arm/mediatek/mediatek,mmsys.yaml (revision 7ef62cebc2f965b0f640263e179276928885e33d) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mmsys.yaml#"
5$schema: "http://devicetree.org/meta-schemas/core.yaml#"
6
7title: MediaTek mmsys controller
8
9maintainers:
10  - Matthias Brugger <matthias.bgg@gmail.com>
11
12description:
13  The MediaTek mmsys system controller provides clock control, routing control,
14  and miscellaneous control in mmsys partition.
15
16properties:
17  $nodename:
18    pattern: "^syscon@[0-9a-f]+$"
19
20  compatible:
21    oneOf:
22      - items:
23          - enum:
24              - mediatek,mt2701-mmsys
25              - mediatek,mt2712-mmsys
26              - mediatek,mt6765-mmsys
27              - mediatek,mt6779-mmsys
28              - mediatek,mt6795-mmsys
29              - mediatek,mt6797-mmsys
30              - mediatek,mt8167-mmsys
31              - mediatek,mt8173-mmsys
32              - mediatek,mt8183-mmsys
33              - mediatek,mt8186-mmsys
34              - mediatek,mt8192-mmsys
35              - mediatek,mt8195-mmsys
36              - mediatek,mt8365-mmsys
37          - const: syscon
38      - items:
39          - const: mediatek,mt7623-mmsys
40          - const: mediatek,mt2701-mmsys
41          - const: syscon
42
43  reg:
44    maxItems: 1
45
46  power-domains:
47    description:
48      A phandle and PM domain specifier as defined by bindings
49      of the power controller specified by phandle. See
50      Documentation/devicetree/bindings/power/power-domain.yaml for details.
51
52  mboxes:
53    description:
54      Using mailbox to communicate with GCE, it should have this
55      property and list of phandle, mailbox specifiers. See
56      Documentation/devicetree/bindings/mailbox/mediatek,gce-mailbox.yaml
57      for details.
58    $ref: /schemas/types.yaml#/definitions/phandle-array
59
60  mediatek,gce-client-reg:
61    description:
62      The register of client driver can be configured by gce with 4 arguments
63      defined in this property, such as phandle of gce, subsys id,
64      register offset and size.
65      Each subsys id is mapping to a base address of display function blocks
66      register which is defined in the gce header
67      include/dt-bindings/gce/<chip>-gce.h.
68    $ref: /schemas/types.yaml#/definitions/phandle-array
69    maxItems: 1
70
71  "#clock-cells":
72    const: 1
73
74  '#reset-cells':
75    const: 1
76
77required:
78  - compatible
79  - reg
80  - "#clock-cells"
81
82additionalProperties: false
83
84examples:
85  - |
86    #include <dt-bindings/power/mt8173-power.h>
87    #include <dt-bindings/gce/mt8173-gce.h>
88
89    mmsys: syscon@14000000 {
90        compatible = "mediatek,mt8173-mmsys", "syscon";
91        reg = <0x14000000 0x1000>;
92        power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
93        #clock-cells = <1>;
94        #reset-cells = <1>;
95        mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
96                 <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
97        mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
98    };
99