1Mediatek IPU controller 2============================ 3 4The Mediatek ipu controller provides various clocks to the system. 5 6Required Properties: 7 8- compatible: Should be one of: 9 - "mediatek,mt8183-ipu_conn", "syscon" 10 - "mediatek,mt8183-ipu_adl", "syscon" 11 - "mediatek,mt8183-ipu_core0", "syscon" 12 - "mediatek,mt8183-ipu_core1", "syscon" 13- #clock-cells: Must be 1 14 15The ipu controller uses the common clk binding from 16Documentation/devicetree/bindings/clock/clock-bindings.txt 17The available clocks are defined in dt-bindings/clock/mt*-clk.h. 18 19Example: 20 21ipu_conn: syscon@19000000 { 22 compatible = "mediatek,mt8183-ipu_conn", "syscon"; 23 reg = <0 0x19000000 0 0x1000>; 24 #clock-cells = <1>; 25}; 26 27ipu_adl: syscon@19010000 { 28 compatible = "mediatek,mt8183-ipu_adl", "syscon"; 29 reg = <0 0x19010000 0 0x1000>; 30 #clock-cells = <1>; 31}; 32 33ipu_core0: syscon@19180000 { 34 compatible = "mediatek,mt8183-ipu_core0", "syscon"; 35 reg = <0 0x19180000 0 0x1000>; 36 #clock-cells = <1>; 37}; 38 39ipu_core1: syscon@19280000 { 40 compatible = "mediatek,mt8183-ipu_core1", "syscon"; 41 reg = <0 0x19280000 0 0x1000>; 42 #clock-cells = <1>; 43}; 44