xref: /freebsd/sys/contrib/device-tree/Bindings/arm/mediatek/mediatek,infracfg.yaml (revision d0b2dbfa0ecf2bbc9709efc5e20baf8e4b44bbbf) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/arm/mediatek/mediatek,infracfg.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: MediaTek Infrastructure System Configuration Controller
8
9maintainers:
10  - Matthias Brugger <matthias.bgg@gmail.com>
11
12description:
13  The Mediatek infracfg controller provides various clocks and reset outputs
14  to the system. The clock values can be found in <dt-bindings/clock/mt*-clk.h>,
15  and reset values in <dt-bindings/reset/mt*-reset.h> and
16  <dt-bindings/reset/mt*-resets.h>.
17
18properties:
19  compatible:
20    oneOf:
21      - items:
22          - enum:
23              - mediatek,mt2701-infracfg
24              - mediatek,mt2712-infracfg
25              - mediatek,mt6765-infracfg
26              - mediatek,mt6795-infracfg
27              - mediatek,mt6779-infracfg_ao
28              - mediatek,mt6797-infracfg
29              - mediatek,mt7622-infracfg
30              - mediatek,mt7629-infracfg
31              - mediatek,mt7981-infracfg
32              - mediatek,mt7986-infracfg
33              - mediatek,mt8135-infracfg
34              - mediatek,mt8167-infracfg
35              - mediatek,mt8173-infracfg
36              - mediatek,mt8183-infracfg
37              - mediatek,mt8516-infracfg
38          - const: syscon
39      - items:
40          - const: mediatek,mt7623-infracfg
41          - const: mediatek,mt2701-infracfg
42          - const: syscon
43
44  reg:
45    maxItems: 1
46
47  '#clock-cells':
48    const: 1
49
50  '#reset-cells':
51    const: 1
52
53required:
54  - compatible
55  - reg
56  - '#clock-cells'
57
58if:
59  properties:
60    compatible:
61      contains:
62        enum:
63          - mediatek,mt2701-infracfg
64          - mediatek,mt2712-infracfg
65          - mediatek,mt6795-infracfg
66          - mediatek,mt7622-infracfg
67          - mediatek,mt7986-infracfg
68          - mediatek,mt8135-infracfg
69          - mediatek,mt8173-infracfg
70          - mediatek,mt8183-infracfg
71then:
72  required:
73    - '#reset-cells'
74
75additionalProperties: false
76
77examples:
78  - |
79    infracfg: clock-controller@10001000 {
80        compatible = "mediatek,mt8173-infracfg", "syscon";
81        reg = <0x10001000 0x1000>;
82        #clock-cells = <1>;
83        #reset-cells = <1>;
84    };
85